From: Gregory Price <gregory.price@memverge.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: linux-cxl@vger.kernel.org
Subject: Re: [GIT preview] for-6.3/cxl-ram-region
Date: Thu, 26 Jan 2023 17:05:56 -0500 [thread overview]
Message-ID: <Y9L5RGZc5lcV2Ina@memverge.com> (raw)
In-Reply-To: <63d21ce66e5c_ea22229446@dwillia2-xfh.jf.intel.com.notmuch>
On Wed, Jan 25, 2023 at 10:25:42PM -0800, Dan Williams wrote:
> There are still some sharp edges on this patchset, like the missing
> device-dax hookup, but it is likely enough to show the direction and
> unblock other testing. Specifically I want to see how this fares with
> Greg's recent volatile region provisioning in QEMU.
>
> I am hoping to have those last bits ironed out before the end of the
> week. Note that this topic branch will rebase so do not base any
> work beyond proof-of-concept on top of it.
>
> https://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git/log/?h=for-6.3/cxl-ram-region
Testing this out now. Pulled it on top of the recent DOE updates so
this build error may be related (or not). But it does look like it's
just a naming collision.
lib/stackinit_kunit.c:34:13: error: conflicting types for ‘range_contains’; have ‘bool(char *, size_t, char *, size_t)’ {aka ‘_Bool(char *, long unsigned int, char *, long unsigned int)’}
34 | static bool range_contains(char *haystack_start, size_t haystack_size,
| ^~~~~~~~~~~~~~
In file included from ./arch/x86/include/asm/page.h:21,
from ./arch/x86/include/asm/thread_info.h:12,
from ./include/linux/thread_info.h:60,
from ./arch/x86/include/asm/preempt.h:9,
from ./include/linux/preempt.h:78,
from ./include/linux/spinlock.h:56,
from ./include/linux/kref.h:16,
from ./include/kunit/test.h:21,
from lib/stackinit_kunit.c:14:
./include/linux/range.h:16:20: note: previous definition of ‘range_contains’ with type ‘bool(struct range *, struct range *)’ {aka ‘_Bool(struct range *, struct range *)’}
16 | static inline bool range_contains(struct range *r1, struct range *r2)
|
Was just going recommend renaming contains to envelops for a quick hack
to fix the build issue.
diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
index 62d5bafd02d1..f781e46a825e 100644
--- a/drivers/cxl/core/pci.c
+++ b/drivers/cxl/core/pci.c
@@ -230,7 +230,7 @@ static int dvsec_range_allowed(struct device *dev, void *arg)
if (!(cxld->flags & CXL_DECODER_F_RAM))
return 0;
- return range_contains(&cxld->hpa_range, dev_range);
+ return range_envelops(&cxld->hpa_range, dev_range);
}
static void disable_hdm(void *_cxlhdm)
diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
index 73d4d451386b..c0cb828b86e3 100644
--- a/drivers/cxl/core/region.c
+++ b/drivers/cxl/core/region.c
@@ -1381,7 +1381,7 @@ static int decoder_match_range(struct device *dev, void *data)
return 0;
cxlsd = to_cxl_switch_decoder(dev);
- return range_contains(&cxlsd->cxld.hpa_range, &cxled->cxld.hpa_range);
+ return range_envelops(&cxlsd->cxld.hpa_range, &cxled->cxld.hpa_range);
}
static void find_positions(const struct cxl_switch_decoder *cxlsd,
@@ -2350,7 +2350,7 @@ static int match_decoder_by_range(struct device *dev, void *data)
cxlrd = to_cxl_root_decoder(dev);
r1 = &cxlrd->cxlsd.cxld.hpa_range;
- return range_contains(r1, r2);
+ return range_envelops(r1, r2);
}
static int match_region_by_range(struct device *dev, void *data)
diff --git a/include/linux/range.h b/include/linux/range.h
index 7efb6a9b069b..8ad8c036d027 100644
--- a/include/linux/range.h
+++ b/include/linux/range.h
@@ -13,7 +13,7 @@ static inline u64 range_len(const struct range *range)
return range->end - range->start + 1;
}
-static inline bool range_contains(struct range *r1, struct range *r2)
+static inline bool range_envelops(struct range *r1, struct range *r2)
{
return r1->start <= r2->start && r1->end >= r2->end;
}
next prev parent reply other threads:[~2023-01-26 22:06 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-26 6:25 [GIT preview] for-6.3/cxl-ram-region Dan Williams
2023-01-26 6:29 ` Dan Williams
2023-01-26 18:50 ` Jonathan Cameron
2023-01-26 19:34 ` Jonathan Cameron
2023-01-30 14:16 ` Gregory Price
2023-01-30 20:10 ` Dan Williams
2023-01-30 20:58 ` Gregory Price
2023-01-30 23:18 ` Dan Williams
2023-01-30 22:00 ` Gregory Price
2023-01-31 2:00 ` Gregory Price
2023-01-31 16:56 ` Dan Williams
2023-01-31 17:59 ` Verma, Vishal L
2023-01-31 19:03 ` Gregory Price
2023-01-31 19:46 ` Verma, Vishal L
2023-01-31 20:24 ` Verma, Vishal L
2023-01-31 23:03 ` Gregory Price
2023-01-31 23:17 ` Gregory Price
2023-01-31 23:50 ` Fan Ni
2023-02-01 5:29 ` Gregory Price
2023-02-01 21:16 ` Gregory Price
2023-02-02 1:06 ` Gregory Price
2023-02-02 16:03 ` Jonathan Cameron
2023-02-01 22:05 ` Gregory Price
2023-02-02 18:13 ` Jonathan Cameron
2023-02-02 0:43 ` Gregory Price
2023-02-02 18:18 ` Dan Williams
2023-02-02 0:44 ` Gregory Price
2023-02-07 16:31 ` Jonathan Cameron
2023-01-30 14:23 ` Gregory Price
2023-01-31 14:56 ` Jonathan Cameron
2023-01-31 17:34 ` Gregory Price
2023-01-26 22:05 ` Gregory Price [this message]
2023-01-26 22:20 ` Dan Williams
2023-02-04 2:36 ` Dan Williams
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