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From: Fan Ni <nifan.cxl@gmail.com>
To: shiju.jose@huawei.com
Cc: dave.jiang@intel.com, dan.j.williams@intel.com,
	jonathan.cameron@huawei.com, alison.schofield@intel.com,
	nifan.cxl@gmail.com, vishal.l.verma@intel.com,
	ira.weiny@intel.com, dave@stgolabs.net,
	linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org,
	linuxarm@huawei.com, tanxiaofei@huawei.com,
	prime.zeng@hisilicon.com
Subject: Re: [PATCH v4 1/6] cxl/events: Update Common Event Record to CXL spec rev 3.1
Date: Tue, 26 Nov 2024 17:27:08 +0000	[thread overview]
Message-ID: <Z0YE7C5NkyydjiRR@smc-140338-bm01> (raw)
In-Reply-To: <20241120093745.1847-2-shiju.jose@huawei.com>

On Wed, Nov 20, 2024 at 09:37:40AM +0000, shiju.jose@huawei.com wrote:
> From: Shiju Jose <shiju.jose@huawei.com>
> 
> CXL spec 3.1 section 8.2.9.2.1 Table 8-42, Common Event Record format has
> updated with Maintenance Operation Subclass information.
The table reference is incorrect, should be Table 8-43 based on spec r3.1,
v1.0, Auguest 7, 2023.

Other than that,


Reviewed-by: Fan Ni <fan.ni@samsung.com>

> 
> Add updates for the above spec change in the CXL events record and CXL
> common trace event implementations.
> 
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Reviewed-by: Davidlohr Bueso <dave@stgolabs.net>
> Signed-off-by: Shiju Jose <shiju.jose@huawei.com>
> ---
>  drivers/cxl/core/trace.h | 13 +++++++++----
>  include/cxl/event.h      |  3 ++-
>  2 files changed, 11 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h
> index 8389a94adb1a..7305974e2301 100644
> --- a/drivers/cxl/core/trace.h
> +++ b/drivers/cxl/core/trace.h
> @@ -166,11 +166,13 @@ TRACE_EVENT(cxl_overflow,
>  #define CXL_EVENT_RECORD_FLAG_MAINT_NEEDED	BIT(3)
>  #define CXL_EVENT_RECORD_FLAG_PERF_DEGRADED	BIT(4)
>  #define CXL_EVENT_RECORD_FLAG_HW_REPLACE	BIT(5)
> +#define CXL_EVENT_RECORD_FLAG_MAINT_OP_SUB_CLASS_VALID	BIT(6)
>  #define show_hdr_flags(flags)	__print_flags(flags, " | ",			   \
>  	{ CXL_EVENT_RECORD_FLAG_PERMANENT,	"PERMANENT_CONDITION"		}, \
>  	{ CXL_EVENT_RECORD_FLAG_MAINT_NEEDED,	"MAINTENANCE_NEEDED"		}, \
>  	{ CXL_EVENT_RECORD_FLAG_PERF_DEGRADED,	"PERFORMANCE_DEGRADED"		}, \
> -	{ CXL_EVENT_RECORD_FLAG_HW_REPLACE,	"HARDWARE_REPLACEMENT_NEEDED"	}  \
> +	{ CXL_EVENT_RECORD_FLAG_HW_REPLACE,	"HARDWARE_REPLACEMENT_NEEDED"	},  \
> +	{ CXL_EVENT_RECORD_FLAG_MAINT_OP_SUB_CLASS_VALID,	"MAINT_OP_SUB_CLASS_VALID" }	\
>  )
>  
>  /*
> @@ -197,7 +199,8 @@ TRACE_EVENT(cxl_overflow,
>  	__field(u16, hdr_related_handle)			\
>  	__field(u64, hdr_timestamp)				\
>  	__field(u8, hdr_length)					\
> -	__field(u8, hdr_maint_op_class)
> +	__field(u8, hdr_maint_op_class)				\
> +	__field(u8, hdr_maint_op_sub_class)
>  
>  #define CXL_EVT_TP_fast_assign(cxlmd, l, hdr)					\
>  	__assign_str(memdev);				\
> @@ -209,17 +212,19 @@ TRACE_EVENT(cxl_overflow,
>  	__entry->hdr_handle = le16_to_cpu((hdr).handle);			\
>  	__entry->hdr_related_handle = le16_to_cpu((hdr).related_handle);	\
>  	__entry->hdr_timestamp = le64_to_cpu((hdr).timestamp);			\
> -	__entry->hdr_maint_op_class = (hdr).maint_op_class
> +	__entry->hdr_maint_op_class = (hdr).maint_op_class;			\
> +	__entry->hdr_maint_op_sub_class = (hdr).maint_op_sub_class
>  
>  #define CXL_EVT_TP_printk(fmt, ...) \
>  	TP_printk("memdev=%s host=%s serial=%lld log=%s : time=%llu uuid=%pUb "	\
>  		"len=%d flags='%s' handle=%x related_handle=%x "		\
> -		"maint_op_class=%u : " fmt,					\
> +		"maint_op_class=%u maint_op_sub_class=%u : " fmt,		\
>  		__get_str(memdev), __get_str(host), __entry->serial,		\
>  		cxl_event_log_type_str(__entry->log),				\
>  		__entry->hdr_timestamp, &__entry->hdr_uuid, __entry->hdr_length,\
>  		show_hdr_flags(__entry->hdr_flags), __entry->hdr_handle,	\
>  		__entry->hdr_related_handle, __entry->hdr_maint_op_class,	\
> +		__entry->hdr_maint_op_sub_class,	\
>  		##__VA_ARGS__)
>  
>  TRACE_EVENT(cxl_generic_event,
> diff --git a/include/cxl/event.h b/include/cxl/event.h
> index 0bea1afbd747..e1d485ad376b 100644
> --- a/include/cxl/event.h
> +++ b/include/cxl/event.h
> @@ -18,7 +18,8 @@ struct cxl_event_record_hdr {
>  	__le16 related_handle;
>  	__le64 timestamp;
>  	u8 maint_op_class;
> -	u8 reserved[15];
> +	u8 maint_op_sub_class;
> +	u8 reserved[14];
>  } __packed;
>  
>  struct cxl_event_media_hdr {
> -- 
> 2.43.0
> 

-- 
Fan Ni (From gmail)

  reply	other threads:[~2024-11-26 17:27 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-20  9:37 [PATCH v4 0/6] Update Event Records to CXL spec rev 3.1 shiju.jose
2024-11-20  9:37 ` [PATCH v4 1/6] cxl/events: Update Common Event Record " shiju.jose
2024-11-26 17:27   ` Fan Ni [this message]
2024-11-27 10:15     ` Shiju Jose
2024-11-20  9:37 ` [PATCH v4 2/6] cxl/events: Add Component Identifier formatting for " shiju.jose
2024-11-20  9:37 ` [PATCH v4 3/6] cxl/events: Update General Media Event Record to " shiju.jose
2024-11-26 11:51   ` Shiju Jose
2024-11-26 17:02     ` Steven Rostedt
2024-11-27 10:12       ` Shiju Jose
2024-11-27 15:41         ` Steven Rostedt
2024-11-27 18:20           ` Shiju Jose
2024-11-27 18:34             ` Steven Rostedt
2024-11-28 10:01               ` Shiju Jose
2024-11-29 13:22                 ` Shiju Jose
2024-12-03 15:21                   ` Shiju Jose
2024-12-04 11:35                     ` Shiju Jose
2024-11-20  9:37 ` [PATCH v4 4/6] cxl/events: Update DRAM " shiju.jose
2024-11-20  9:37 ` [PATCH v4 5/6] cxl/events: Update Memory Module " shiju.jose
2024-11-20  9:37 ` [PATCH v4 6/6] cxl/test: Update test code for event records " shiju.jose

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