Re: [PATCH] cxl/hdm: Extend DVSEC range register emulation for region enumeration

[Gregory Price <gregory.price@memverge.com>]

On Mon, Apr 17, 2023 at 10:51:41PM -0700, Dan Williams wrote:
> > DVSEC CXL Range 1 Size Low: 804
> > memory_info_valid == 0
> > memory_active == 0
> 
> Is this CXL_DVSEC_RANGE_SIZE_LOW(1) or literally "DVSEC CXL Range 1 Size
> Low" which Linux calls the offset CXL_DVSEC_RANGE_SIZE_LOW(0)? If its
> the former, it's valid for the second range to be disabled. Linux stack
> should have failed cxl_await_media_ready() otherwise if this is
> referring to CXL_DVSEC_RANGE_SIZE_LOW(0).
>

disregard, i was looking at size_low(0) but i misread the output, the
real value was 804b, so the lower 2 bits were set (which is what is
expected).

> > All this considered:  It's still head-scratching why shifting the HPA
> > read from the range register successfully produces a "working device",
> > but I suppose that's the definition of "undefined behavior" :]
> 
> The needs the platform vendor to weigh in, but that may not be possible
> if this is evaluation hardware.

Mostly i'm scratching my head at the fact that the device is programmed
with base:0x0 size:2gb where the HPA is almost certainly not 0.  I
originally attempted to set the value of the register to the expected
HPA and that caused what i presume was a machine check (haven't
investigated further yet).

What's confusing about this is one assumes that the CPU puts the HPA on
the bus (0x1080000000 in this case) but the base register has 0x0 -
which should produce a failure.  Instead it works.

Just a real head-scratcher, but i'm going to close this as "hardware's
jacked" at this point.