* [PATCH] cxl/region: fix "x9"->"x6" interleaving in a comment
@ 2023-12-13 16:02 ` Brice Goglin
2023-12-13 16:11 ` Jim Harris
0 siblings, 1 reply; 2+ messages in thread
From: Brice Goglin @ 2023-12-13 16:02 UTC (permalink / raw)
To: linux-cxl@vger.kernel.org
[-- Attachment #1.1: Type: text/plain, Size: 770 bytes --]
Signed-off-by: Brice Goglin <Brice.Goglin@inria.fr>
---
drivers/cxl/core/region.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
index 56e575c79bb4..d99f6698168d 100644
--- a/drivers/cxl/core/region.c
+++ b/drivers/cxl/core/region.c
@@ -397,7 +397,7 @@ static ssize_t interleave_ways_store(struct device *dev,
return rc;
/*
- * Even for x3, x9, and x12 interleaves the region interleave must be a
+ * Even for x3, x6, and x12 interleaves the region interleave must be a
* power of 2 multiple of the host bridge interleave.
*/
if (!is_power_of_2(val / cxld->interleave_ways) ||
--
2.42.0
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 840 bytes --]
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] cxl/region: fix "x9"->"x6" interleaving in a comment
2023-12-13 16:02 ` [PATCH] cxl/region: fix "x9"->"x6" interleaving in a comment Brice Goglin
@ 2023-12-13 16:11 ` Jim Harris
0 siblings, 0 replies; 2+ messages in thread
From: Jim Harris @ 2023-12-13 16:11 UTC (permalink / raw)
To: Brice Goglin; +Cc: linux-cxl@vger.kernel.org
On Wed, Dec 13, 2023 at 05:02:35PM +0100, Brice Goglin wrote:
> Signed-off-by: Brice Goglin <Brice.Goglin@inria.fr>
> ---
> drivers/cxl/core/region.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
> index 56e575c79bb4..d99f6698168d 100644
> --- a/drivers/cxl/core/region.c
> +++ b/drivers/cxl/core/region.c
> @@ -397,7 +397,7 @@ static ssize_t interleave_ways_store(struct device *dev,
> return rc;
>
> /*
> - * Even for x3, x9, and x12 interleaves the region interleave must be a
> + * Even for x3, x6, and x12 interleaves the region interleave must be a
> * power of 2 multiple of the host bridge interleave.
> */
> if (!is_power_of_2(val / cxld->interleave_ways) ||
> --
> 2.42.0
>
>
I've pushed this same patch out a few weeks ago.
https://lore.kernel.org/linux-cxl/169904271254.204936.8580772404462743630.stgit@ubuntu/
Jim
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2023-12-13 16:11 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
[not found] <CGME20231213161115uscas1p1909966a964a3a5816fb516940c9be047@uscas1p1.samsung.com>
2023-12-13 16:02 ` [PATCH] cxl/region: fix "x9"->"x6" interleaving in a comment Brice Goglin
2023-12-13 16:11 ` Jim Harris
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox