* [PATCH] cxl/mem: Fix a double shift bug
@ 2023-07-03 14:17 Dan Carpenter
2023-07-05 17:43 ` Dave Jiang
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Dan Carpenter @ 2023-07-03 14:17 UTC (permalink / raw)
To: Vishal Verma
Cc: Alison Schofield, Ira Weiny, Ben Widawsky, Dan Williams,
Jonathan Cameron, Dave Jiang, linux-cxl, linux-kernel,
kernel-janitors
The CXL_FW_CANCEL macro is used with set/test_bit() so it should be a
bit number and not the shifted value. The original code is the
equivalent of using BIT(BIT(0)) so it's 0x2 instead of 0x1. This has
no effect on runtime because it's done consistently and nothing else
was using the 0x2 bit.
Fixes: 9521875bbe00 ("cxl: add a firmware update mechanism using the sysfs firmware loader")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
---
drivers/cxl/cxlmem.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
index 79e99c873ca2..499113328586 100644
--- a/drivers/cxl/cxlmem.h
+++ b/drivers/cxl/cxlmem.h
@@ -323,7 +323,7 @@ struct cxl_mbox_activate_fw {
/* FW state bits */
#define CXL_FW_STATE_BITS 32
-#define CXL_FW_CANCEL BIT(0)
+#define CXL_FW_CANCEL 0
/**
* struct cxl_fw_state - Firmware upload / activation state
--
2.39.2
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH] cxl/mem: Fix a double shift bug
2023-07-03 14:17 [PATCH] cxl/mem: Fix a double shift bug Dan Carpenter
@ 2023-07-05 17:43 ` Dave Jiang
2023-07-12 18:03 ` Davidlohr Bueso
2023-07-12 19:34 ` Verma, Vishal L
2 siblings, 0 replies; 4+ messages in thread
From: Dave Jiang @ 2023-07-05 17:43 UTC (permalink / raw)
To: Dan Carpenter, Vishal Verma
Cc: Alison Schofield, Ira Weiny, Ben Widawsky, Dan Williams,
Jonathan Cameron, linux-cxl, linux-kernel, kernel-janitors
On 7/3/23 07:17, Dan Carpenter wrote:
> The CXL_FW_CANCEL macro is used with set/test_bit() so it should be a
> bit number and not the shifted value. The original code is the
> equivalent of using BIT(BIT(0)) so it's 0x2 instead of 0x1. This has
> no effect on runtime because it's done consistently and nothing else
> was using the 0x2 bit.
>
> Fixes: 9521875bbe00 ("cxl: add a firmware update mechanism using the sysfs firmware loader")
> Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> ---
> drivers/cxl/cxlmem.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
> index 79e99c873ca2..499113328586 100644
> --- a/drivers/cxl/cxlmem.h
> +++ b/drivers/cxl/cxlmem.h
> @@ -323,7 +323,7 @@ struct cxl_mbox_activate_fw {
>
> /* FW state bits */
> #define CXL_FW_STATE_BITS 32
> -#define CXL_FW_CANCEL BIT(0)
> +#define CXL_FW_CANCEL 0
>
> /**
> * struct cxl_fw_state - Firmware upload / activation state
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] cxl/mem: Fix a double shift bug
2023-07-03 14:17 [PATCH] cxl/mem: Fix a double shift bug Dan Carpenter
2023-07-05 17:43 ` Dave Jiang
@ 2023-07-12 18:03 ` Davidlohr Bueso
2023-07-12 19:34 ` Verma, Vishal L
2 siblings, 0 replies; 4+ messages in thread
From: Davidlohr Bueso @ 2023-07-12 18:03 UTC (permalink / raw)
To: Dan Carpenter
Cc: Vishal Verma, Alison Schofield, Ira Weiny, Ben Widawsky,
Dan Williams, Jonathan Cameron, Dave Jiang, linux-cxl,
linux-kernel, kernel-janitors
On Mon, 03 Jul 2023, Dan Carpenter wrote:
>The CXL_FW_CANCEL macro is used with set/test_bit() so it should be a
>bit number and not the shifted value. The original code is the
>equivalent of using BIT(BIT(0)) so it's 0x2 instead of 0x1. This has
>no effect on runtime because it's done consistently and nothing else
>was using the 0x2 bit.
>
>Fixes: 9521875bbe00 ("cxl: add a firmware update mechanism using the sysfs firmware loader")
>Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Davidlohr Bueso <dave@stgolabs.net>
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] cxl/mem: Fix a double shift bug
2023-07-03 14:17 [PATCH] cxl/mem: Fix a double shift bug Dan Carpenter
2023-07-05 17:43 ` Dave Jiang
2023-07-12 18:03 ` Davidlohr Bueso
@ 2023-07-12 19:34 ` Verma, Vishal L
2 siblings, 0 replies; 4+ messages in thread
From: Verma, Vishal L @ 2023-07-12 19:34 UTC (permalink / raw)
To: dan.carpenter@linaro.org
Cc: kernel-janitors@vger.kernel.org, Jiang, Dave, Schofield, Alison,
Jonathan.Cameron@huawei.com, linux-cxl@vger.kernel.org,
linux-kernel@vger.kernel.org, Williams, Dan J, Weiny, Ira,
bwidawsk@kernel.org
On Mon, 2023-07-03 at 17:17 +0300, Dan Carpenter wrote:
> The CXL_FW_CANCEL macro is used with set/test_bit() so it should be a
> bit number and not the shifted value. The original code is the
> equivalent of using BIT(BIT(0)) so it's 0x2 instead of 0x1. This has
> no effect on runtime because it's done consistently and nothing else
> was using the 0x2 bit.
>
> Fixes: 9521875bbe00 ("cxl: add a firmware update mechanism using the sysfs firmware loader")
> Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Vishal Verma <vishal.l.verma@intel.com>
> ---
> drivers/cxl/cxlmem.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
> index 79e99c873ca2..499113328586 100644
> --- a/drivers/cxl/cxlmem.h
> +++ b/drivers/cxl/cxlmem.h
> @@ -323,7 +323,7 @@ struct cxl_mbox_activate_fw {
>
> /* FW state bits */
> #define CXL_FW_STATE_BITS 32
> -#define CXL_FW_CANCEL BIT(0)
> +#define CXL_FW_CANCEL 0
>
> /**
> * struct cxl_fw_state - Firmware upload / activation state
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2023-07-12 19:34 UTC | newest]
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2023-07-03 14:17 [PATCH] cxl/mem: Fix a double shift bug Dan Carpenter
2023-07-05 17:43 ` Dave Jiang
2023-07-12 18:03 ` Davidlohr Bueso
2023-07-12 19:34 ` Verma, Vishal L
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