[GIT PULL] Compute Express Link (CXL) changes for Linux 7.1

[GIT PULL] Compute Express Link (CXL) changes for Linux 7.1

[Dave Jiang]

Hi Linus, please pull from:

git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git tags/cxl-for-7.1

...to receive a collection of CXL changes. The significant change of interest
is the handling of soft reserved memory conflict between CXL and HMEM. In
essence CXL will be the first to claim the soft reserved memory ranges that
belongs to CXL and attempt to enumerate them with best effort. If CXL is not
able to enumerate the ranges it will punt them to HMEM.

There are also MAINTAINERS email changes from Dan Williams and Jonathan Cameron.

These have all appeared in -next for a few days (minus the MAINTAINERS change
from Jonathan that came in last minute) with no reported issues.

---

The following changes since commit f338e77383789c0cae23ca3d48adcc5e9e137e3c:

  Linux 7.0-rc4 (2026-03-15 13:52:05 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git tags/cxl-for-7.1

for you to fetch changes up to 6c724ce0ec6ed8608917673bbb363b208ce2644c:

  Merge branch 'for-7.1/cxl-misc' into cxl-for-next (2026-04-15 08:16:31 -0700)

----------------------------------------------------------------
CXL changes for v7.1

Misc patches:
tools/testing/cxl: Enable replay of user regions as auto regions
cxl/region: Add a region sysfs interface for region lock status
cxl/core: Check existence of cxl_memdev_state in poison test
cxl: Add endpoint decoder flags clear when PCI reset happens
ACPI: NUMA: Only parse CFMWS at boot when CXL_ACPI is on
MAINTAINERS: Update address for Dan Williams
cxl/hdm: Add support for 32 switch decoders
MAINTAINERS: Update Jonathan Cameron's email address

Ensure endppoint complete initialization before usage:
cxl/pci: Check memdev driver binding status in cxl_reset_done()
cxl/pci: Hold memdev lock in cxl_event_trace_record()

Type2 prepatory patches:
cxl/region: Factor out interleave granularity setup
cxl/region: Factor out interleave ways setup
cxl: Make region type based on endpoint type
cxl/pci: Remove redundant cxl_pci_find_port() call
cxl: Move pci generic code from cxl_pci to core/cxl_pci
cxl: export internal structs for external Type2 drivers
cxl: support Type2 when initializing cxl_dev_state

Patch series that deals with soft reserved memory conflict between CXL and HMEM:
tools/testing/cxl: Test dax_hmem takeover of CXL regions
tools/testing/cxl: Simulate auto-assembly failure
dax/hmem: Parent dax_hmem devices
dax/hmem: Fix singleton confusion between dax_hmem_work and hmem devices
dax/hmem: Reduce visibility of dax_cxl coordination symbols
cxl/region: Constify cxl_region_resource_contains()
cxl/region: Limit visibility of cxl_region_contains_resource()
dax/cxl: Fix HMEM dependencies
cxl/region: Fix use-after-free from auto assembly failure
dax/hmem, cxl: Defer and resolve Soft Reserved ownership
cxl/region: Add helper to check Soft Reserved containment by CXL regions
dax: Track all dax_region allocations under a global resource tree
dax/cxl, hmem: Initialize hmem early and defer dax_cxl binding
dax/hmem: Gate Soft Reserved deferral on DEV_DAX_CXL
dax/hmem: Request cxl_acpi and cxl_pci before walking Soft Reserved ranges
dax/hmem: Factor HMEM registration into __hmem_register_device()
dax/bus: Use dax_region_put() in alloc_dax_region() error path

Refactor CXL core/region code to make region code more manageable by
splitting out DAX and PMEM code from RAM handling code:
cxl/core: use cleanup.h for devm_cxl_add_dax_region
cxl/core/region: move dax region device logic into region_dax.c
cxl/core/region: move pmem region driver logic into region_pmem.c

----------------------------------------------------------------
Alejandro Lucero (6):
      cxl: support Type2 when initializing cxl_dev_state
      cxl: export internal structs for external Type2 drivers
      cxl: Move pci generic code from cxl_pci to core/cxl_pci
      cxl: Make region type based on endpoint type
      cxl/region: Factor out interleave ways setup
      cxl/region: Factor out interleave granularity setup

Alison Schofield (2):
      cxl/core: Check existence of cxl_memdev_state in poison test
      tools/testing/cxl: Enable replay of user regions as auto regions

Dan Williams (13):
      dax/hmem: Request cxl_acpi and cxl_pci before walking Soft Reserved ranges
      dax/hmem: Gate Soft Reserved deferral on DEV_DAX_CXL
      dax/cxl, hmem: Initialize hmem early and defer dax_cxl binding
      cxl/region: Fix use-after-free from auto assembly failure
      dax/cxl: Fix HMEM dependencies
      cxl/region: Limit visibility of cxl_region_contains_resource()
      cxl/region: Constify cxl_region_resource_contains()
      dax/hmem: Reduce visibility of dax_cxl coordination symbols
      dax/hmem: Fix singleton confusion between dax_hmem_work and hmem devices
      dax/hmem: Parent dax_hmem devices
      tools/testing/cxl: Simulate auto-assembly failure
      tools/testing/cxl: Test dax_hmem takeover of CXL regions
      MAINTAINERS: Update address for Dan Williams

Dave Jiang (9):
      Merge tag 'device_lock_cond_guard-7.1-rc1' into for-7.1/cxl-consolidate-endpoint
      cxl: Add endpoint decoder flags clear when PCI reset happens
      Merge branch 'for-7.1/cxl-consolidate-endpoint' into cxl-for-next
      Merge branch 'for-7.1/cxl-type2-support' into cxl-for-next
      Merge branch 'for-7.1/dax-hmem' into cxl-for-next
      Merge branch 'for-7.1/cxl-region-refactor' into cxl-for-next
      Merge branch 'for-7.1/cxl-misc' into cxl-for-next
      Merge branch 'for-7.1/cxl-misc' into cxl-for-next
      Merge branch 'for-7.1/cxl-misc' into cxl-for-next

Gregory Price (4):
      cxl/pci: Remove redundant cxl_pci_find_port() call
      cxl/core/region: move pmem region driver logic into region_pmem.c
      cxl/core/region: move dax region device logic into region_dax.c
      cxl/core: use cleanup.h for devm_cxl_add_dax_region

Jonathan Cameron (1):
      MAINTAINERS: Update Jonathan Cameron's email address

Kai Huang (1):
      ACPI: NUMA: Only parse CFMWS at boot when CXL_ACPI is on

Li Ming (5):
      driver core: Add conditional guard support for device_lock()
      cxl/pci: Hold memdev lock in cxl_event_trace_record()
      cxl/pci: Check memdev driver binding status in cxl_reset_done()
      cxl/region: Add a region sysfs interface for region lock status
      cxl/hdm: Add support for 32 switch decoders

Smita Koralahalli (5):
      dax/bus: Use dax_region_put() in alloc_dax_region() error path
      dax/hmem: Factor HMEM registration into __hmem_register_device()
      dax: Track all dax_region allocations under a global resource tree
      cxl/region: Add helper to check Soft Reserved containment by CXL regions
      dax/hmem, cxl: Defer and resolve Soft Reserved ownership

 .mailmap                                |   2 +
 Documentation/ABI/testing/sysfs-bus-cxl |  13 +
 MAINTAINERS                             |  26 +-
 drivers/acpi/numa/srat.c                |   7 +-
 drivers/cxl/core/Makefile               |   2 +-
 drivers/cxl/core/core.h                 |   4 +
 drivers/cxl/core/hdm.c                  |   2 +-
 drivers/cxl/core/mbox.c                 |  17 +-
 drivers/cxl/core/memdev.c               |  27 ++
 drivers/cxl/core/pci.c                  |  57 ++++
 drivers/cxl/core/region.c               | 479 +++++++++++---------------------
 drivers/cxl/core/region_dax.c           | 106 +++++++
 drivers/cxl/core/region_pmem.c          | 191 +++++++++++++
 drivers/cxl/core/regs.c                 |   1 -
 drivers/cxl/cxl.h                       | 123 ++------
 drivers/cxl/cxlmem.h                    |  90 +-----
 drivers/cxl/cxlpci.h                    |  13 +
 drivers/cxl/pci.c                       | 103 ++-----
 drivers/dax/Kconfig                     |   4 +
 drivers/dax/Makefile                    |   3 +-
 drivers/dax/bus.c                       |  20 +-
 drivers/dax/bus.h                       |  20 ++
 drivers/dax/cxl.c                       |  28 +-
 drivers/dax/hmem/device.c               |  25 +-
 drivers/dax/hmem/hmem.c                 | 120 ++++++--
 include/cxl/cxl.h                       | 226 +++++++++++++++
 include/linux/device.h                  |   1 +
 tools/testing/cxl/Kbuild                |   9 +-
 tools/testing/cxl/test/Kbuild           |   1 +
 tools/testing/cxl/test/cxl.c            | 449 +++++++++++++++++++++++++++++-
 tools/testing/cxl/test/hmem_test.c      |  47 ++++
 tools/testing/cxl/test/mem.c            |   6 +-
 tools/testing/cxl/test/mock.c           |  50 ++++
 tools/testing/cxl/test/mock.h           |   8 +
 34 files changed, 1626 insertions(+), 654 deletions(-)
 create mode 100644 drivers/cxl/core/region_dax.c
 create mode 100644 drivers/cxl/core/region_pmem.c
 create mode 100644 include/cxl/cxl.h
 create mode 100644 tools/testing/cxl/test/hmem_test.c

Re: [GIT PULL] Compute Express Link (CXL) changes for Linux 7.1

[pr-tracker-bot]

The pull request you sent on Thu, 16 Apr 2026 11:00:02 -0700:

> git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git tags/cxl-for-7.1

has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/12bffaef28820e0b94c644c75708195c61af78f7

Thank you!

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