From: Bryan O'Donoghue <bod@kernel.org>
To: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>,
Bjorn Andersson <andersson@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney@redhat.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Taniya Das <taniya.das@oss.qualcomm.com>,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: Re: [PATCH v4 2/3] clk: qcom: camcc-glymur: Add camera clock controller driver
Date: Mon, 18 May 2026 13:21:42 +0100 [thread overview]
Message-ID: <0a197b43-a672-4849-91c7-6e5bfe3175f7@kernel.org> (raw)
In-Reply-To: <2a496bdf-4728-47b9-84ba-063712a6e5b6@oss.qualcomm.com>
On 18/05/2026 11:23, Jagadeesh Kona wrote:
>
>
> On 5/18/2026 1:05 PM, Bryan O'Donoghue wrote:
>> On 17/05/2026 18:33, Jagadeesh Kona wrote:
>>> +/* 1200.0 MHz Configuration */
>>> +static const struct alpha_pll_config cam_cc_pll0_config = {
>>> + .l = 0x3e,
>>> + .alpha = 0x8000,
>>> + .config_ctl_val = 0x25c400e7,
>>> + .config_ctl_hi_val = 0x0a8060e0,
>>> + .config_ctl_hi1_val = 0xf51dea20,
>>> + .user_ctl_val = 0x00008408,
>>> + .user_ctl_hi_val = 0x00000002,
>>> +};
>>
>> I'll again push back on these magic numbers.
>>
>> At the very least you should be mentioning in the cover letter log why you _aren't_ making that change.
>>
>> Just reposting and hoping it slips by the person making the comment isn't too cool.
>>
>> Why can't qcom update the python? script that generates this code to enumerate fields instead of magic numbers here ?
>>
>> I get you don't want to do it but, just ignoring the review feedback is no OK.
>>
>> What gives ?
>>
>
> Hi Bryan,
>
> I haven't ignored your comments & already responded to your earlier comment on why the bit fields are not
> defined. Most of these values are static settings we get from PLL HW team and we program them only once
> as is during bootup and are never reused again anywhere from PLL code, so these bits are not defined.
>
> Please find the earlier responses for your comments below:
> https://lore.kernel.org/all/b92a2cbb-fe8d-4378-aa02-d91e2e4dfff4@oss.qualcomm.com/
> https://lore.kernel.org/all/009ecdbb-2297-44eb-862d-233e3290691c@oss.qualcomm.com/
>
> Thanks,
> Jagadeesh
That's not in your overview letter so generally I'd advise to include
things like "did X because Y" - "didn't do Q because Z" anyway, how does
it make a difference if the values are static ?
They are no less magic numbers that way.
What exactly is the resistance to defining the bits ?
I'll state again - when a vendor is submitting something upstream where
that vendor 100% controls their own documentation - there's no reason at
all to be presenting magic hex numbers - even more the case with
generated code.
Just update the script to enumerate the bit fields, I honestly don't get
the aversion.
---
bod
next prev parent reply other threads:[~2026-05-18 12:21 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-17 17:33 [PATCH v4 0/3] Add camera clock controller support on Glymur platform Jagadeesh Kona
2026-05-17 17:33 ` [PATCH v4 1/3] dt-bindings: clock: qcom: Add Glymur camera clock controller Jagadeesh Kona
2026-06-12 12:35 ` Vladimir Zapolskiy
2026-05-17 17:33 ` [PATCH v4 2/3] clk: qcom: camcc-glymur: Add camera clock controller driver Jagadeesh Kona
2026-05-17 18:13 ` sashiko-bot
2026-05-18 7:35 ` Bryan O'Donoghue
2026-05-18 10:23 ` Jagadeesh Kona
2026-05-18 12:21 ` Bryan O'Donoghue [this message]
2026-05-25 7:06 ` Jagadeesh Kona
2026-05-25 7:49 ` Bryan O'Donoghue
2026-06-11 8:51 ` Konrad Dybcio
2026-06-12 6:31 ` Dmitry Baryshkov
2026-06-12 11:14 ` Bryan O'Donoghue
2026-06-22 17:50 ` Taniya Das
2026-06-12 12:40 ` Vladimir Zapolskiy
2026-05-17 17:33 ` [PATCH v4 3/3] arm64: dts: qcom: glymur: Add camera clock controller support Jagadeesh Kona
2026-06-12 12:42 ` Vladimir Zapolskiy
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=0a197b43-a672-4849-91c7-6e5bfe3175f7@kernel.org \
--to=bod@kernel.org \
--cc=andersson@kernel.org \
--cc=bmasney@redhat.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=jagadeesh.kona@oss.qualcomm.com \
--cc=konrad.dybcio@oss.qualcomm.com \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mturquette@baylibre.com \
--cc=robh@kernel.org \
--cc=sboyd@kernel.org \
--cc=taniya.das@oss.qualcomm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox