Re: [PATCH v4 13/13] arm64: dts: qcom: shikra: Add support for DISPCC/GPUCC nodes

[Imran Shaik <imran.shaik@oss.qualcomm.com>]

On 29-06-2026 03:21 pm, Konrad Dybcio wrote:
> On 6/29/26 8:43 AM, Imran Shaik wrote:
>>
>>
>> On 25-06-2026 02:14 pm, Konrad Dybcio wrote:
>>> On 6/4/26 7:26 AM, Imran Shaik wrote:
>>>> Add support for Display clock controller and GPU clock controller nodes
>>>> on Qualcomm Shikra SoCs.
>>>>
>>>> Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
>>>> ---
> 
> [...]
> 
>>>> +                      "gcc_disp_gpll0_clk_src",
>>>> +                      "gcc_disp_gpll0_div_clk_src",
>>>> +                      "dsi0_phy_pll_out_byteclk",
>>>> +                      "dsi0_phy_pll_out_dsiclk",
>>>> +                      "dsi1_phy_pll_out_byteclk",
>>>> +                      "dsi1_phy_pll_out_dsiclk",
>>>> +                      "sleep_clk";
>>>> +            #clock-cells = <1>;
>>>> +            #reset-cells = <1>;
>>>> +            #power-domain-cells = <1>;
>>>
>>> DISP_CC also needs to source power from somewhere!
>>>
>>
>> The Shikra bindings aligns with the existing Agatti bindings, as it is a re-use. And the Shikra/Agatti DISPCC is on CX rail, and it will be always ON when APPS is active.
> 
> Yes, it will be on, but currently the genpd performance state requests
> (i.e. RPMH states) go to /dev/null because DISP_CC is an orphan
> 

Sure, will check and add the power-domains support as well in the
bindings and update the DT accordingly for Shikra and Agatti both.

Thanks,
Imran