[PATCH 0/2] Glymur DT QoL

[PATCH 0/2] Glymur DT QoL

[Konrad Dybcio]

Two tiny no-dependencies changes that have no business waiting for
other patches to settle.

Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
Konrad Dybcio (2):
      arm64: dts: qcom: smb2370: Disable SMB2370_2 by default
      arm64: dts: qcom: glymur: Add PCIe port compatibles and ports

 arch/arm64/boot/dts/qcom/glymur.dtsi  | 24 ++++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/smb2370.dtsi |  2 ++
 2 files changed, 26 insertions(+)
---
base-commit: b8809969e1d7a591e0f49dd464a5d04b3cf02ab1
change-id: 20260716-topic-smb2370_port2-378c563a99ce

Best regards,
--  
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

[PATCH 1/2] arm64: dts: qcom: smb2370: Disable SMB2370_2 by default

[Konrad Dybcio]

From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

It's absent on laptops that only have 2 type-C ports (the majority so
far, including the CRD). Keep it disabled by default, following
established practice from the previous generation.

Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/smb2370.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/smb2370.dtsi b/arch/arm64/boot/dts/qcom/smb2370.dtsi
index 80f3fdae5705..1e02578e4ee3 100644
--- a/arch/arm64/boot/dts/qcom/smb2370.dtsi
+++ b/arch/arm64/boot/dts/qcom/smb2370.dtsi
@@ -36,6 +36,8 @@ smb2370_l_e2: pmic@b {
 		#address-cells = <1>;
 		#size-cells = <0>;
 
+		status = "disabled";
+
 		smb2370_l_e2_eusb2_repeater: phy@fd00 {
 			compatible = "qcom,smb2370-eusb2-repeater";
 			reg = <0xfd00>;

-- 
2.55.0

Re: [PATCH 1/2] arm64: dts: qcom: smb2370: Disable SMB2370_2 by default

[Gopikrishna Garmidi]

On 7/16/2026 11:03 PM, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> 
> It's absent on laptops that only have 2 type-C ports (the majority so
> far, including the CRD). Keep it disabled by default, following
> established practice from the previous generation.
> 
> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> ---
>   arch/arm64/boot/dts/qcom/smb2370.dtsi | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/smb2370.dtsi b/arch/arm64/boot/dts/qcom/smb2370.dtsi
> index 80f3fdae5705..1e02578e4ee3 100644
> --- a/arch/arm64/boot/dts/qcom/smb2370.dtsi
> +++ b/arch/arm64/boot/dts/qcom/smb2370.dtsi
> @@ -36,6 +36,8 @@ smb2370_l_e2: pmic@b {
>   		#address-cells = <1>;
>   		#size-cells = <0>;
>   
> +		status = "disabled";
> +
>   		smb2370_l_e2_eusb2_repeater: phy@fd00 {
>   			compatible = "qcom,smb2370-eusb2-repeater";
>   			reg = <0xfd00>;
> 
Reviewed-by: Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com>

[PATCH 2/2] arm64: dts: qcom: glymur: Add PCIe port compatibles and ports

[Konrad Dybcio]

From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Centrally define the endpoints to let device DTs that describe PCIe
devices and/or M.2 connectors refer to them without error-prone
duplication.

Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/glymur.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
index 55d91c696a3a..8d7354affd48 100644
--- a/arch/arm64/boot/dts/qcom/glymur.dtsi
+++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
@@ -2946,6 +2946,7 @@ opp-32000000-4 {
 
 			pcie4_port0: pcie@0 {
 				device_type = "pci";
+				compatible = "pciclass,0604";
 				reg = <0x0 0x0 0x0 0x0 0x0>;
 				bus-range = <0x01 0xff>;
 
@@ -2954,6 +2955,11 @@ pcie4_port0: pcie@0 {
 				#address-cells = <3>;
 				#size-cells = <2>;
 				ranges;
+
+				port {
+					pcie4_port0_ep: endpoint {
+					};
+				};
 			};
 		};
 
@@ -3212,6 +3218,7 @@ opp-128000000-5 {
 
 			pcie5_port0: pcie@0 {
 				device_type = "pci";
+				compatible = "pciclass,0604";
 				reg = <0x0 0x0 0x0 0x0 0x0>;
 				bus-range = <0x01 0xff>;
 
@@ -3220,6 +3227,11 @@ pcie5_port0: pcie@0 {
 				#address-cells = <3>;
 				#size-cells = <2>;
 				ranges;
+
+				port {
+					pcie5_port0_ep: endpoint {
+					};
+				};
 			};
 		};
 
@@ -3422,6 +3434,7 @@ opp-32000000-4 {
 
 			pcie6_port0: pcie@0 {
 				device_type = "pci";
+				compatible = "pciclass,0604";
 				reg = <0x0 0x0 0x0 0x0 0x0>;
 				bus-range = <0x01 0xff>;
 
@@ -3430,6 +3443,11 @@ pcie6_port0: pcie@0 {
 				#address-cells = <3>;
 				#size-cells = <2>;
 				ranges;
+
+				port {
+					pcie6_port0_ep: endpoint {
+					};
+				};
 			};
 		};
 
@@ -3688,6 +3706,7 @@ opp-128000000-5 {
 
 			pcie3b_port0: pcie@0 {
 				device_type = "pci";
+				compatible = "pciclass,0604";
 				reg = <0x0 0x0 0x0 0x0 0x0>;
 				bus-range = <0x01 0xff>;
 
@@ -3696,6 +3715,11 @@ pcie3b_port0: pcie@0 {
 				#address-cells = <3>;
 				#size-cells = <2>;
 				ranges;
+
+				port {
+					pcie3b_port0_ep: endpoint {
+					};
+				};
 			};
 		};
 

-- 
2.55.0

Re: [PATCH 0/2] Glymur DT QoL

[Bjorn Andersson]

On Thu, 16 Jul 2026 19:33:41 +0200, Konrad Dybcio wrote:
> Two tiny no-dependencies changes that have no business waiting for
> other patches to settle.
> 
> 

Applied, thanks!

[1/2] arm64: dts: qcom: smb2370: Disable SMB2370_2 by default
      commit: f922f586c67d2b2c5d476679a4afaebbc4126817
[2/2] arm64: dts: qcom: glymur: Add PCIe port compatibles and ports
      commit: e9d928da6f25e2c0d926c15b66fab52602e86f8f

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>