Re: [PATCH v3 01/11] devfreq: tegra30-devfreq: add support for Tegra114

[Mikko Perttunen <mperttunen@nvidia.com>]

On Tuesday, November 11, 2025 10:34 PM Svyatoslav Ryhel wrote:
> вт, 11 лист. 2025 р. о 10:55 Mikko Perttunen <mperttunen@nvidia.com> пише:
> >
> > On Monday, September 15, 2025 5:01 PM Svyatoslav Ryhel wrote:
> > > Lets add Tegra114 support to activity monitor device as a preparation to
> > > upcoming EMC controller support.
> > >
> > > Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
> > > ---
> > >  drivers/devfreq/tegra30-devfreq.c | 1 +
> > >  1 file changed, 1 insertion(+)
> > >
> > > diff --git a/drivers/devfreq/tegra30-devfreq.c b/drivers/devfreq/tegra30-devfreq.c
> > > index 8ea5b482bfb3..d976077d4757 100644
> > > --- a/drivers/devfreq/tegra30-devfreq.c
> > > +++ b/drivers/devfreq/tegra30-devfreq.c
> > > @@ -980,6 +980,7 @@ static const struct tegra_devfreq_soc_data tegra30_soc = {
> > >
> > >  static const struct of_device_id tegra_devfreq_of_match[] = {
> > >       { .compatible = "nvidia,tegra30-actmon",  .data = &tegra30_soc, },
> > > +     { .compatible = "nvidia,tegra114-actmon", .data = &tegra124_soc, },
> > >       { .compatible = "nvidia,tegra124-actmon", .data = &tegra124_soc, },
> > >       { },
> > >  };
> > >
> >
> > Looking at my copy of L4T r21, the EMC count_weight should be 256 on Tegra114, while it is 4*256 on Tegra124, so different SoC data should be used. (I haven't checked if anything else is different)
> >
> 
> You are correct, tegra114 seems to use 1 EMC clock per transaction. I
> will move and expand comment from tegra124 entry regarding
> count_weight to include info about all 3 supported entries if you
> don't mind.
> 
> I have a question regarding tegra_devfreq_device_config to be used
> with tegra114. From tegratab kernel I have, existing
> tegra124_device_configs configuration seems to fit tegra114, may you
> confirm this? Or, if L4T r21 you use, uses different values, may you
> provide those to fill up tegra_devfreq_device_config for tegra114.

Can confirm the offset and irq mask are the same. The coefficients are a bit different in the L4T tree but they don't match the upstream tegra124 values either so I guess that's fine.

Here's the exact values:

static struct actmon_dev actmon_dev_emc = {
        .reg    = 0x1c0,
        .glb_status_irq_mask = (0x1 << 26),
        .dev_id = "tegra_actmon",
        .con_id = "emc",

        /* EMC suspend floor to guarantee suspend entry on PLLM */
        .suspend_freq           = EMC_PLLP_FREQ_MAX + 2000,

        .boost_freq_step        = 16000,
        .boost_up_coef          = 200,
        .boost_down_coef        = 50,
#if (defined(CONFIG_ARCH_TEGRA_14x_SOC) || \
         defined(CONFIG_ARCH_TEGRA_12x_SOC) || \
         defined(CONFIG_ARCH_TEGRA_13x_SOC))
        .boost_up_threshold     = 70,
        .boost_down_threshold   = 50,
#else
        .boost_up_threshold     = 60,
        .boost_down_threshold   = 40,
#endif

        .up_wmark_window        = 1,
        .down_wmark_window      = 3,
        .avg_window_log2        = ACTMON_DEFAULT_AVG_WINDOW_LOG2,
#if defined(CONFIG_ARCH_TEGRA_3x_SOC) || defined(CONFIG_ARCH_TEGRA_14x_SOC)
        .count_weight           = 0x200,
#elif defined(CONFIG_ARCH_TEGRA_12x_SOC) || defined(CONFIG_ARCH_TEGRA_13x_SOC)
        .count_weight           = 0x400,
#else
        .count_weight           = 0x100,
#endif

        .type                   = ACTMON_FREQ_SAMPLER,
        .state                  = ACTMON_UNINITIALIZED,

        .rate_change_nb = {
                .notifier_call = actmon_rate_notify_cb,
        },
};



#if defined(CONFIG_ARCH_TEGRA_12x_SOC) || defined(CONFIG_ARCH_TEGRA_13x_SOC)
#define CPU_AVG_ACT_THRESHOLD 2000
#else
#define CPU_AVG_ACT_THRESHOLD 50000
#endif
/* EMC-cpu activity monitor: frequency sampling device:
 * activity counter is incremented every 256 memory transactions, and
 * each transaction takes 2 EMC clocks; count_weight = 512 on Tegra3.
 * On Tegra11 there is only 1 clock per transaction, hence weight = 256.
 */
static struct actmon_dev actmon_dev_cpu_emc = {
        .reg = 0x200,
        .glb_status_irq_mask = (0x1 << 25),
        .dev_id = "tegra_mon",
        .con_id = "cpu_emc",

        .boost_freq_step        = 16000,
        .boost_up_coef          = 800,
        .boost_down_coef        = 90,
        .boost_up_threshold     = 27,
        .boost_down_threshold   = 10,
        .avg_dependency_threshold       = CPU_AVG_ACT_THRESHOLD,

        .up_wmark_window        = 1,
        .down_wmark_window      = 3,
        .avg_window_log2        = ACTMON_DEFAULT_AVG_WINDOW_LOG2,
#if defined(CONFIG_ARCH_TEGRA_3x_SOC) || defined(CONFIG_ARCH_TEGRA_14x_SOC)
        .count_weight           = 0x200,
#elif defined(CONFIG_ARCH_TEGRA_12x_SOC) || defined(CONFIG_ARCH_TEGRA_13x_SOC)
        .count_weight           = 0x400,
#else
        .count_weight           = 0x100,
#endif

        .type                   = ACTMON_FREQ_SAMPLER,
        .state                  = ACTMON_UNINITIALIZED,

        .rate_change_nb = {
                .notifier_call = actmon_rate_notify_cb,
        },
};


> 
> > Cheers,
> > Mikko
> >
> >