From: fugang.duan@nxp.com
To: andrew@lunn.ch, martin.fuzzey@flowbird.group,
davem@davemloft.net, s.hauer@pengutronix.de
Cc: netdev@vger.kernel.org, robh+dt@kernel.org, shawnguo@kernel.org,
devicetree@vger.kernel.org, kuba@kernel.org, fugang.duan@nxp.com
Subject: [PATCH net v3 4/4] ARM: dts: imx6qdl-sabresd: enable fec wake-on-lan
Date: Tue, 26 May 2020 00:27:13 +0800 [thread overview]
Message-ID: <1590424033-16906-5-git-send-email-fugang.duan@nxp.com> (raw)
In-Reply-To: <1590424033-16906-1-git-send-email-fugang.duan@nxp.com>
From: Fugang Duan <fugang.duan@nxp.com>
Enable ethernet wake-on-lan feature for imx6q/dl/qp sabresd
boards since the PHY clock is supplied by external osc.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
---
arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index fe59dde..28b35cc 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -204,6 +204,7 @@
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii-id";
phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
+ fsl,magic-packet;
status = "okay";
};
--
2.7.4
next prev parent reply other threads:[~2020-05-25 16:32 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-25 16:27 [PATCH net v3 0/4] net: ethernet: fec: move GPR reigster offset and bit into DT fugang.duan
2020-05-25 16:27 ` [PATCH net v3 1/4] net: ethernet: fec: move GPR register " fugang.duan
2020-05-25 16:27 ` [PATCH net v3 2/4] dt-bindings: fec: update the gpr property fugang.duan
2020-05-25 16:27 ` [PATCH net v3 3/4] ARM: dts: imx: add ethernet stop mode property fugang.duan
2020-05-25 16:27 ` fugang.duan [this message]
2020-05-27 3:22 ` [PATCH net v3 0/4] net: ethernet: fec: move GPR reigster offset and bit into DT David Miller
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