* [PATCH] dt-bindings: PCI: xilinx-cpm: Fix ranges property to avoid overlapping of bridge register and 32-bit BAR addresses
@ 2024-06-24 11:10 Thippeswamy Havalige
2024-06-24 11:36 ` Krzysztof Kozlowski
2024-06-25 1:14 ` Krzysztof Wilczyński
0 siblings, 2 replies; 3+ messages in thread
From: Thippeswamy Havalige @ 2024-06-24 11:10 UTC (permalink / raw)
To: bhelgaas, kw, robh, krzk+dt, conor+dt, lpieralisi
Cc: linux-pci, devicetree, linux-kernel, bharat.kumar.gogada,
Thippeswamy Havalige
The current configuration had non-prefetchable memory overlapping with
bridge registers by 64KB from base address. This patch fixes the 'ranges'
property in the device tree by adjusting the non-prefetchable memory
addresses beyond the 64KB mark to prevent conflicts.
Signed-off-by: Thippeswamy Havalige <thippesw@amd.com>
---
Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
index 4770ce02fcc3..989fb0fa2577 100644
--- a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
+++ b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
@@ -92,7 +92,7 @@ examples:
<0 0 0 3 &pcie_intc_0 2>,
<0 0 0 4 &pcie_intc_0 3>;
bus-range = <0x00 0xff>;
- ranges = <0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000>,
+ ranges = <0x02000000 0x0 0xe0010000 0x0 0xe0010000 0x0 0x10000000>,
<0x43000000 0x80 0x00000000 0x80 0x00000000 0x0 0x80000000>;
msi-map = <0x0 &its_gic 0x0 0x10000>;
reg = <0x0 0xfca10000 0x0 0x1000>,
--
2.25.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH] dt-bindings: PCI: xilinx-cpm: Fix ranges property to avoid overlapping of bridge register and 32-bit BAR addresses
2024-06-24 11:10 [PATCH] dt-bindings: PCI: xilinx-cpm: Fix ranges property to avoid overlapping of bridge register and 32-bit BAR addresses Thippeswamy Havalige
@ 2024-06-24 11:36 ` Krzysztof Kozlowski
2024-06-25 1:14 ` Krzysztof Wilczyński
1 sibling, 0 replies; 3+ messages in thread
From: Krzysztof Kozlowski @ 2024-06-24 11:36 UTC (permalink / raw)
To: Thippeswamy Havalige, bhelgaas, kw, robh, krzk+dt, conor+dt,
lpieralisi
Cc: linux-pci, devicetree, linux-kernel, bharat.kumar.gogada
On 24/06/2024 13:10, Thippeswamy Havalige wrote:
> The current configuration had non-prefetchable memory overlapping with
> bridge registers by 64KB from base address. This patch fixes the 'ranges'
> property in the device tree by adjusting the non-prefetchable memory
> addresses beyond the 64KB mark to prevent conflicts.
>
> Signed-off-by: Thippeswamy Havalige <thippesw@amd.com>
> ---
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] dt-bindings: PCI: xilinx-cpm: Fix ranges property to avoid overlapping of bridge register and 32-bit BAR addresses
2024-06-24 11:10 [PATCH] dt-bindings: PCI: xilinx-cpm: Fix ranges property to avoid overlapping of bridge register and 32-bit BAR addresses Thippeswamy Havalige
2024-06-24 11:36 ` Krzysztof Kozlowski
@ 2024-06-25 1:14 ` Krzysztof Wilczyński
1 sibling, 0 replies; 3+ messages in thread
From: Krzysztof Wilczyński @ 2024-06-25 1:14 UTC (permalink / raw)
To: Thippeswamy Havalige
Cc: bhelgaas, robh, krzk+dt, conor+dt, lpieralisi, linux-pci,
devicetree, linux-kernel, bharat.kumar.gogada
Hello,
> The current configuration had non-prefetchable memory overlapping with
> bridge registers by 64KB from base address. This patch fixes the 'ranges'
> property in the device tree by adjusting the non-prefetchable memory
> addresses beyond the 64KB mark to prevent conflicts.
Applied to dt-bindings, thank you!
[1/1] dt-bindings: PCI: xilinx-cpm: Fix overlapping of bridge register and 32-bit BAR addresses
https://git.kernel.org/pci/pci/c/f55aed050631
Krzysztof
^ permalink raw reply [flat|nested] 3+ messages in thread
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2024-06-24 11:10 [PATCH] dt-bindings: PCI: xilinx-cpm: Fix ranges property to avoid overlapping of bridge register and 32-bit BAR addresses Thippeswamy Havalige
2024-06-24 11:36 ` Krzysztof Kozlowski
2024-06-25 1:14 ` Krzysztof Wilczyński
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