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From: Jia Wang <wangjia@ultrarisc.com>
To: sashiko-reviews@lists.linux.dev
Cc: Jia Wang via B4 Relay <devnull+wangjia.ultrarisc.com@kernel.org>,
	 devicetree@vger.kernel.org, robh@kernel.org,
	conor+dt@kernel.org
Subject: Re: [PATCH v2 1/2] dt-bindings: pinctrl: Add UltraRISC DP1000 pinctrl controller
Date: Sat, 06 Jun 2026 13:56:47 +0800	[thread overview]
Message-ID: <178072540755.310568.3446097812860239551.b4-reply@b4> (raw)
In-Reply-To: <20260601100602.A4F931F00898@smtp.kernel.org>

On 2026-06-01 10:06 +0000, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [Low] The conditional schema constraints fail to prevent non-LPC pins (Ports A-D) from being assigned the 'lpc' or 'espi' mux functions.
> --
> 
> commit 579eeac83b351ad50317d72079e0436d73706e08
> Author: Jia Wang <wangjia@ultrarisc.com>
> 
> dt-bindings: pinctrl: Add UltraRISC DP1000 pinctrl controller
> 
> This commit adds the device tree binding documentation for the pin controller
> found on the UltraRISC DP1000 RISC-V SoC. It defines properties for ports
> A-D and LPC pins, including supported mux functions and pin configurations.
> 
> > diff --git a/Documentation/devicetree/bindings/pinctrl/ultrarisc,dp1000-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ultrarisc,dp1000-pinctrl.yaml
> > new file mode 100644
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pinctrl/ultrarisc,dp1000-pinctrl.yaml
> 
> [ ... ]
> 
> > +patternProperties:
> > +  '.*-pins$':
> > +    type: object
> > +    unevaluatedProperties: false
> > +    allOf:
> > +      - $ref: /schemas/pinctrl/pincfg-node.yaml#
> > +      - $ref: /schemas/pinctrl/pinmux-node.yaml#
> > +      - if:
> > +          properties:
> > +            pins:
> > +              contains:
> > +                pattern: '^LPC([0-9]|1[0-2])$'
> > +        then:
> > +          properties:
> > +            function:
> > +              enum:
> > +                - lpc
> > +                - espi
> 
> [Severity: Low]
> Does this schema allow Ports A-D to incorrectly select the lpc or espi
> functions?
> 
> The if-then block restricts LPC pins to the lpc or espi functions, but it
> appears to lack a reciprocal constraint preventing non-LPC pins from being
> assigned to these functions.
> 
> Because lpc and espi are included in the base function enum defined later in
> the schema, an invalid device tree might silently pass schema validation if it
> mistakenly assigns the lpc or espi functions to Ports A-D.
> 
> Would it be helpful to add an else clause here, or a separate if-then block,
> to explicitly forbid lpc and espi on non-LPC pins?
>

Thanks for the review. I'll update the schema to also reject lpc/espi
functions on non-LPC pins in v3.
 
> -- 
> Sashiko AI review · https://sashiko.dev/#/patchset/20260601-ultrarisc-pinctrl-v2-0-07ac5130a96d@ultrarisc.com?part=1
> 

Best regards,
Jia Wang



  reply	other threads:[~2026-06-06  5:57 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-01  9:56 [PATCH v2 0/2] pinctrl: ultrarisc: add DP1000 pinctrl support Jia Wang via B4 Relay
2026-06-01  9:56 ` [PATCH v2 1/2] dt-bindings: pinctrl: Add UltraRISC DP1000 pinctrl controller Jia Wang via B4 Relay
2026-06-01 10:06   ` sashiko-bot
2026-06-06  5:56     ` Jia Wang [this message]
2026-06-02 16:53   ` Conor Dooley
2026-06-06  6:01     ` Jia Wang
2026-06-01  9:56 ` [PATCH v2 2/2] pinctrl: ultrarisc: Add UltraRISC DP1000 pinctrl driver Jia Wang via B4 Relay
2026-06-01 10:22   ` sashiko-bot
2026-06-06  6:06     ` Jia Wang

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