From: bod@kernel.org
To: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com>
Cc: Bryan O'Donoghue <bod@kernel.org>, Vinod Koul <vkoul@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Manivannan Sadhasivam <mani@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bryan O'Donoghue <bryan.odonoghue@linaro.org>,
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>,
Loic Poulain <loic.poulain@oss.qualcomm.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Abel Vesa <abelvesa@kernel.org>,
linux-phy@lists.infradead.org, linux-media@vger.kernel.org,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
jeyaprakash.soundrapandian@oss.qualcomm.com,
Vijay Kumar Tumati <vijay.tumati@oss.qualcomm.com>
Subject: Re: [PATCH v19 02/12] phy: qcom-mipi-csi2: Parametrise the common status register offset
Date: Thu, 08 Oct 2026 23:08:28 +0100 [thread overview]
Message-ID: <179149730801.2577499.10468166672933780845.b4-reply@b4> (raw)
In-Reply-To: <20261008-kaanapali-camss-v19-2-b2c583ef50e0@oss.qualcomm.com>
On 2026-10-08 00:14 -0700, Hangxiang Ma wrote:
> The CSI2 PHY common status registers are not at a fixed offset from the
> common register block across SoCs: x1e80100 uses 0xb0 while other 3PH
> v2.4.0 parts differ.
>
> Replace the hard-coded 0xb0 in CSIPHY_3PH_CMN_CSI_COMMON_STATUSn() with
> a per-SoC common_status_offset field in struct mipi_csi2phy_device_regs,
> initialising x1e80100 to 0xb0 so behaviour is unchanged. This is a
> no-functional-change preparation for describing other SoC offsets.
>
> Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com>
> csi2phy->hw_version |= (tmp << 8) & 0xFF00;
Reviewed-by: Bryan O'Donoghue <bod@kernel.org>
--
Bryan O'Donoghue <bod@kernel.org>
next prev parent reply other threads:[~2026-10-08 22:08 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-08 7:14 [PATCH v19 00/12] media: qcom: camss: Add Kaanapali support Hangxiang Ma
2026-10-08 7:14 ` [PATCH v19 01/12] dt-bindings: phy: qcom,x1e80100-csi2-phy: Add Kaanapali CSI2 PHY Hangxiang Ma
2026-10-08 7:14 ` [PATCH v19 02/12] phy: qcom-mipi-csi2: Parametrise the common status register offset Hangxiang Ma
2026-10-08 22:08 ` bod [this message]
2026-10-08 7:14 ` [PATCH v19 03/12] phy: qcom-mipi-csi2: Add Kaanapali support Hangxiang Ma
2026-10-08 22:32 ` bod
2026-10-08 7:14 ` [PATCH v19 04/12] media: dt-bindings: Add CAMSS device for Kaanapali Hangxiang Ma
2026-10-08 7:14 ` [PATCH v19 05/12] media: qcom: camss: Add Kaanapali compatible Hangxiang Ma
2026-10-08 7:29 ` sashiko-bot
2026-10-08 7:14 ` [PATCH v19 06/12] media: qcom: camss: csiphy: Add support for v2.4.0 two-phase CSIPHY Hangxiang Ma
2026-10-08 7:30 ` sashiko-bot
2026-10-08 22:38 ` bod
2026-10-08 7:14 ` [PATCH v19 07/12] media: qcom: camss: csid: Add support for CSID 1080 Hangxiang Ma
2026-10-08 7:32 ` sashiko-bot
2026-10-08 7:14 ` [PATCH v19 08/12] media: qcom: camss: vfe: Add support for VFE 1080 Hangxiang Ma
2026-10-08 7:33 ` sashiko-bot
2026-10-08 22:50 ` bod
2026-10-09 2:59 ` Hangxiang Ma
2026-10-09 8:39 ` Bryan O'Donoghue
2026-10-09 11:36 ` Hangxiang Ma
2026-10-08 7:14 ` [PATCH v19 09/12] media: qcom: camss: tpg: Add support for v2.4.0 TPG Hangxiang Ma
2026-10-08 7:27 ` sashiko-bot
2026-10-08 7:14 ` [PATCH v19 10/12] arm64: dts: qcom: kaanapali: Add CAMSS and CSIPHY block definitions Hangxiang Ma
2026-10-08 7:38 ` sashiko-bot
2026-10-09 8:40 ` Bryan O'Donoghue
2026-10-09 8:45 ` hangxiang.ma
2026-10-08 7:14 ` [PATCH v19 11/12] arm64: dts: qcom: kaanapali: Add CCI controller nodes Hangxiang Ma
2026-10-08 16:16 ` Loic Poulain
2026-10-09 4:06 ` Hangxiang Ma
2026-10-08 7:14 ` [PATCH v19 12/12] arm64: dts: qcom: kaanapali: Add camera MCLK pinctrl Hangxiang Ma
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