From: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com>
To: Bryan O'Donoghue <bryan.odonoghue@linaro.org>, bod@kernel.org
Cc: Vinod Koul <vkoul@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Manivannan Sadhasivam <mani@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>,
Loic Poulain <loic.poulain@oss.qualcomm.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Abel Vesa <abelvesa@kernel.org>,
linux-phy@lists.infradead.org, linux-media@vger.kernel.org,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
jeyaprakash.soundrapandian@oss.qualcomm.com,
Vijay Kumar Tumati <vijay.tumati@oss.qualcomm.com>,
Atiya Kailany <atiya.kailany@oss.qualcomm.com>
Subject: Re: [PATCH v19 08/12] media: qcom: camss: vfe: Add support for VFE 1080
Date: Fri, 9 Oct 2026 19:36:19 +0800 [thread overview]
Message-ID: <9afa48c4-b5b7-43b8-80e5-d829906a2088@oss.qualcomm.com> (raw)
In-Reply-To: <8a2ff836-57ce-4df6-aaae-0db3f36e8b58@linaro.org>
On 10/9/2026 4:39 PM, Bryan O'Donoghue wrote:
> On 09/10/2026 03:59, Hangxiang Ma wrote:
>>>> diff --git a/drivers/media/platform/qcom/camss/Makefile b/drivers/
>>>> media/platform/qcom/camss/Makefile
>>>> index 218ba3a95939..42a14e8fe1b7 100644
>>>> --- a/drivers/media/platform/qcom/camss/Makefile
>>>> +++ b/drivers/media/platform/qcom/camss/Makefile
>>>> @@ -26,6 +26,7 @@ qcom-camss-objs += \
>>>> camss-vfe-340.o \
>>>> camss-vfe-480.o \
>>>> camss-vfe-680.o \
>>>> + camss-vfe-1080.o \
>>>
>>> Can't say I'm 1000000% clear on when reg_update() is supposed to
>>> happen in
>>> the flow of the logic you have here.
>>>
>>> I'm a bit suspicious of adding a new flag which skips the update but
>>> assumes some other bit of code executes later and does that update.
>>>
>>> Can you explain this some more please.
>>>
>>
>> Thanks for the review. These points were discussed in an earlier
>> revision, but I should have explained them directly in this version.
>>
>> Vijay once clarified that the configuration principle became more
>> strict since Kaanapali. We can back to <https://lore.kernel.org/
>> all/662a21a3- de8b-406f-a15d-b8a572aa79ab@oss.qualcomm.com/> for more
>> details.
>>
>> In short, the hardware guidance asks to issue the REG_UPDATE after all
>> of the CSID configuration registers are written. Kaanapali seems to
>> have very strict dependency in the hardware about this sequence and
>> with the original sequence, no RUP DONE or BUF DONE events are
>> received at all. While other chipsets can work normally.
>
> But how/where are we saying that happens ?
>
> ---
> bod
Hi Bryan,
When reg_update_after_csid_config is set, vfe_enable_output_v2() loads
the buffers but skips reg_update. The RUP is written later from
csid_configure_stream(), after the RX and RDI configuration.
On stream start:
video_start_streaming()
s_stream(1) on VFE <- walked upstream from video node
vfe_enable_output_v2() <- only load buffers, no reg_update
s_stream(1) on CSID
csid_set_stream()
csid_configure_stream() <- if need_vc_update, else not
program RX config
for each VC:
program RDI and RX VC config
AUP + RUP (__csid_reg_update covers both)
RDI_CTRL start
On this path the VFE reg_update is itself a CSID write, CSID_AUP_CMD
and RUP_SET in csid_subdev_reg_update(), not a VFE register write.
RUP goes in after the configuration writes. Only the RDI_CTRL start
command follows it.
The video streaming function walks the pipeline upstream from the video
node and calls s_stream(1) on each subdev in turn, so the VFE is always
started before the CSID. What isn't obvious is that
vfe_enable_output_v2() depends on that order to get its RUP issued at all.
On Kaanapali, REG_UPDATE has to come after the CSID configuration is
written, otherwise no RUP DONE or BUF DONE is seen. I haven't reproduced
the failure case myself as no BUF_DONE count mismatch and frame missing
events are observed. So I think the information get from hardware
guidance should be reliable. Thanks.
---
Best Regards,
Hangxiang
next prev parent reply other threads:[~2026-10-09 11:36 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-08 7:14 [PATCH v19 00/12] media: qcom: camss: Add Kaanapali support Hangxiang Ma
2026-10-08 7:14 ` [PATCH v19 01/12] dt-bindings: phy: qcom,x1e80100-csi2-phy: Add Kaanapali CSI2 PHY Hangxiang Ma
2026-10-08 7:14 ` [PATCH v19 02/12] phy: qcom-mipi-csi2: Parametrise the common status register offset Hangxiang Ma
2026-10-08 22:08 ` bod
2026-10-08 7:14 ` [PATCH v19 03/12] phy: qcom-mipi-csi2: Add Kaanapali support Hangxiang Ma
2026-10-08 22:32 ` bod
2026-10-08 7:14 ` [PATCH v19 04/12] media: dt-bindings: Add CAMSS device for Kaanapali Hangxiang Ma
2026-10-08 7:14 ` [PATCH v19 05/12] media: qcom: camss: Add Kaanapali compatible Hangxiang Ma
2026-10-08 7:29 ` sashiko-bot
2026-10-08 7:14 ` [PATCH v19 06/12] media: qcom: camss: csiphy: Add support for v2.4.0 two-phase CSIPHY Hangxiang Ma
2026-10-08 7:30 ` sashiko-bot
2026-10-08 22:38 ` bod
2026-10-08 7:14 ` [PATCH v19 07/12] media: qcom: camss: csid: Add support for CSID 1080 Hangxiang Ma
2026-10-08 7:32 ` sashiko-bot
2026-10-08 7:14 ` [PATCH v19 08/12] media: qcom: camss: vfe: Add support for VFE 1080 Hangxiang Ma
2026-10-08 7:33 ` sashiko-bot
2026-10-08 22:50 ` bod
2026-10-09 2:59 ` Hangxiang Ma
2026-10-09 8:39 ` Bryan O'Donoghue
2026-10-09 11:36 ` Hangxiang Ma [this message]
2026-10-08 7:14 ` [PATCH v19 09/12] media: qcom: camss: tpg: Add support for v2.4.0 TPG Hangxiang Ma
2026-10-08 7:27 ` sashiko-bot
2026-10-08 7:14 ` [PATCH v19 10/12] arm64: dts: qcom: kaanapali: Add CAMSS and CSIPHY block definitions Hangxiang Ma
2026-10-08 7:38 ` sashiko-bot
2026-10-09 8:40 ` Bryan O'Donoghue
2026-10-09 8:45 ` hangxiang.ma
2026-10-08 7:14 ` [PATCH v19 11/12] arm64: dts: qcom: kaanapali: Add CCI controller nodes Hangxiang Ma
2026-10-08 16:16 ` Loic Poulain
2026-10-09 4:06 ` Hangxiang Ma
2026-10-08 7:14 ` [PATCH v19 12/12] arm64: dts: qcom: kaanapali: Add camera MCLK pinctrl Hangxiang Ma
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