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From: "Yu-Chun Lin [林祐君]" <eleanor.lin@realtek.com>
To: "Krzysztof Kozlowski" <krzk@kernel.org>,
	"robh@kernel.org" <robh@kernel.org>,
	"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
	"conor+dt@kernel.org" <conor+dt@kernel.org>,
	"TY_Chang[張子逸]" <tychang@realtek.com>
Cc: "CY_Huang[黃鉦晏]" <cy.huang@realtek.com>,
	"Stanley Chang[昌育德]" <stanley_chang@realtek.com>,
	"James Tai [戴志峰]" <james.tai@realtek.com>,
	"afaerber@suse.com" <afaerber@suse.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-realtek-soc@lists.infradead.org"
	<linux-realtek-soc@lists.infradead.org>
Subject: RE: [PATCH 1/3] dt-bindings: soc: realtek: Add Realtek DHC I/O level detector
Date: Fri, 5 Jun 2026 10:19:11 +0000	[thread overview]
Message-ID: <1850ca790a2f4af1b1682aeb437e47fc@realtek.com> (raw)
In-Reply-To: <4d96835a-a273-4c46-85a2-03c059934650@kernel.org>

> From: Krzysztof Kozlowski <krzk@kernel.org>
> Sent: Thursday, June 4, 2026 8:49 PM
> To: Yu-Chun Lin [林祐君] <eleanor.lin@realtek.com>; robh@kernel.org;
> krzk+dt@kernel.org; conor+dt@kernel.org; TY_Chang[張子逸]
> <tychang@realtek.com>
> Cc: CY_Huang[黃鉦晏] <cy.huang@realtek.com>; Stanley Chang[昌育德]
> <stanley_chang@realtek.com>; James Tai [戴志峰] <james.tai@realtek.com>;
> afaerber@suse.com; devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-realtek-soc@lists.infradead.org
> Subject: Re: [PATCH 1/3] dt-bindings: soc: realtek: Add Realtek DHC I/O level
> detector
> 
> On 04/06/2026 13:18, Yu-Chun Lin wrote:
> > From: Tzuyi Chang <tychang@realtek.com>
> >
> > Add device tree binding documentation for the Realtek DHC I/O level
> > detector.
> >
> > This hardware block is responsible for detecting the I/O signaling
> > levels (e.g., 1.8V or 3.3V) of various interfaces (RGMII, SDIO, eMMC,
> > etc.) and applying the corresponding pad configurations via pinctrl
> > states.
> >
> > Signed-off-by: Tzuyi Chang <tychang@realtek.com>
> > Signed-off-by: Yu-Chun Lin <eleanor.lin@realtek.com>
> > ---
> >  .../realtek/realtek,rtd1625-io-detect.yaml    | 77 +++++++++++++++++++
> >  1 file changed, 77 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/soc/realtek/realtek,rtd1625-io-detec
> > t.yaml
> >
> > diff --git
> > a/Documentation/devicetree/bindings/soc/realtek/realtek,rtd1625-io-det
> > ect.yaml
> > b/Documentation/devicetree/bindings/soc/realtek/realtek,rtd1625-io-det
> > ect.yaml
> > new file mode 100644
> > index 000000000000..badf27212dfd
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/soc/realtek/realtek,rtd1625-io
> > +++ -detect.yaml
> > @@ -0,0 +1,77 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) # Copyright 2026
> > +Realtek Semiconductor Corporation %YAML 1.2
> > +---
> > +$id:
> > +http://devicetree.org/schemas/soc/realtek/realtek,rtd1625-io-detect.y
> > +aml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Realtek DHC I/O Level Detector
> > +
> > +maintainers:
> > +  - Tzuyi Chang <tychang@realtek.com>
> > +
> > +description: |
> 
> Drop |
> 
> > +  The Realtek DHC I/O Level Detector is a hardware block that detects
> > + I/O  signaling levels (such as 1.8V or 3.3V) to determine the
> > + correct pad  configurations for specific IP blocks.
> > +
> > +properties:
> > +  compatible:
> > +    const: realtek,rtd1625-io-detect
> > +
> 
> No resources here, so does not look like a real device, but driver instantiation.
> 

Hi Krzysztof,

You're right, It shouldn't introduce a device node just for a software driver.

For v2, we'll drop this binding and the device node, and revisit the approach.

Best regards,
Yu-Chun

> 
> > +  pinctrl-names:
> > +    items:
> > +      - const: rgmii_1v8
> > +      - const: rgmii_3v3
> > +      - const: sdio_1v8
> > +      - const: sdio_3v3
> > +      - const: csi_1v8
> > +      - const: csi_3v3
> > +      - const: sd_1v8
> > +      - const: sd_3v3
> > +      - const: uart1_1v8
> > +      - const: uart1_3v3
> > +      - const: aio_1v8
> > +      - const: aio_3v3
> > +      - const: emmc_1v8
> > +      - const: emmc_3v3
> > +
> > +  realtek,iso-pinctrl:
> > +    $ref: /schemas/types.yaml#/definitions/phandle
> > +    description:
> > +      Pinctrl phandle containing I/O detection registers.
> 
> MMIO registers are in 'reg' property.
> 
> > +
> > +required:
> > +  - compatible
> > +  - pinctrl-names
> > +  - realtek,iso-pinctrl
> Best regards,
> Krzysztof

  reply	other threads:[~2026-06-05 10:19 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-04 11:18 [PATCH 0/3] soc: realtek: Add Realtek DHC I/O level detector support Yu-Chun Lin
2026-06-04 11:18 ` [PATCH 1/3] dt-bindings: soc: realtek: Add Realtek DHC I/O level detector Yu-Chun Lin
2026-06-04 11:26   ` sashiko-bot
2026-06-04 12:49   ` Krzysztof Kozlowski
2026-06-05 10:19     ` Yu-Chun Lin [林祐君] [this message]
2026-06-04 11:18 ` [PATCH 2/3] soc: realtek: Add driver for " Yu-Chun Lin
2026-06-04 11:28   ` sashiko-bot
2026-06-04 11:18 ` [PATCH 3/3] arm64: dts: realtek: Add " Yu-Chun Lin
2026-06-04 11:33   ` sashiko-bot

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