* [RESEND PATCH v3] mtd: hisilicon: add device tree node for NAND controller
@ 2015-03-25 7:04 Zhou Wang
[not found] ` <1427267091-227474-1-git-send-email-wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
0 siblings, 1 reply; 5+ messages in thread
From: Zhou Wang @ 2015-03-25 7:04 UTC (permalink / raw)
To: Haojian Zhuang, Wei Xu, Brian Norris, Arnd Bergmann
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
liguozhu-C8/M+/jPZTeaMJb+Lgu22Q, Zhou Wang
This patch adds dts support for NAND flash controller of Hisilicon Soc Hip04.
Now it is based on v4.0-rc5
Changes in v3:
- Change E-mail address in signed-off-by to "wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org"
Changes in v2:
- Base on v3.19-rc1
- Use nand-ecc-strength, nand-ecc-step-size to replace hisi,nand-ecc-bits
Changes in v1:
- Move partition and other board related information into board dts file:
hip04-d01.dts
Signed-off-by: Zhou Wang <wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
---
arch/arm/boot/dts/hip04-d01.dts | 27 +++++++++++++++++++++++++++
arch/arm/boot/dts/hip04.dtsi | 7 +++++++
2 files changed, 34 insertions(+)
diff --git a/arch/arm/boot/dts/hip04-d01.dts b/arch/arm/boot/dts/hip04-d01.dts
index 40a9e33..ba04dd5 100644
--- a/arch/arm/boot/dts/hip04-d01.dts
+++ b/arch/arm/boot/dts/hip04-d01.dts
@@ -28,5 +28,32 @@
uart0: uart@4007000 {
status = "ok";
};
+
+ nand: nand@4020000 {
+ nand-bus-width = <8>;
+ nand-ecc-mode = "hw";
+ nand-ecc-strength = <16>;
+ nand-ecc-step-size = <1024>;
+
+ partition@0 {
+ label = "nand_text";
+ reg = <0x00000000 0x00400000>;
+ };
+
+ partition@00400000 {
+ label = "nand_monitor";
+ reg = <0x00400000 0x00400000>;
+ };
+
+ partition@00800000 {
+ label = "nand_kernel";
+ reg = <0x00800000 0x00800000>;
+ };
+
+ partition@01000000 {
+ label = "nand_fs";
+ reg = <0x01000000 0x1f000000>;
+ };
+ };
};
};
diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi
index 2388145..ac32fce 100644
--- a/arch/arm/boot/dts/hip04.dtsi
+++ b/arch/arm/boot/dts/hip04.dtsi
@@ -269,6 +269,13 @@
interrupts = <0 372 4>;
};
+ nand: nand@4020000 {
+ compatible = "hisilicon,504-nfc";
+ reg = <0x4020000 0x10000>, <0x5000000 0x1000>;
+ interrupts = <0 379 4>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
};
etb@0,e3c42000 {
--
1.9.1
--
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^ permalink raw reply related [flat|nested] 5+ messages in thread[parent not found: <1427267091-227474-1-git-send-email-wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>]
* Re: [RESEND PATCH v3] mtd: hisilicon: add device tree node for NAND controller [not found] ` <1427267091-227474-1-git-send-email-wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org> @ 2015-03-26 2:13 ` Haojian Zhuang [not found] ` <CAD6h2NQr_Z600vC+7RRuLgoGvV4MCXz8TAd4C5eCnqbA0ZdPWw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2015-03-27 17:35 ` Brian Norris 1 sibling, 1 reply; 5+ messages in thread From: Haojian Zhuang @ 2015-03-26 2:13 UTC (permalink / raw) To: Zhou Wang Cc: Wei Xu, Brian Norris, Arnd Bergmann, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Liguozhu (Kenneth) On 25 March 2015 at 15:04, Zhou Wang <wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org> wrote: > This patch adds dts support for NAND flash controller of Hisilicon Soc Hip04. > Now it is based on v4.0-rc5 > > Changes in v3: > - Change E-mail address in signed-off-by to "wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org" > Changes in v2: > - Base on v3.19-rc1 > - Use nand-ecc-strength, nand-ecc-step-size to replace hisi,nand-ecc-bits > Changes in v1: > - Move partition and other board related information into board dts file: > hip04-d01.dts > > Signed-off-by: Zhou Wang <wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org> > --- > arch/arm/boot/dts/hip04-d01.dts | 27 +++++++++++++++++++++++++++ > arch/arm/boot/dts/hip04.dtsi | 7 +++++++ > 2 files changed, 34 insertions(+) > > diff --git a/arch/arm/boot/dts/hip04-d01.dts b/arch/arm/boot/dts/hip04-d01.dts > index 40a9e33..ba04dd5 100644 > --- a/arch/arm/boot/dts/hip04-d01.dts > +++ b/arch/arm/boot/dts/hip04-d01.dts > @@ -28,5 +28,32 @@ > uart0: uart@4007000 { > status = "ok"; > }; > + > + nand: nand@4020000 { > + nand-bus-width = <8>; > + nand-ecc-mode = "hw"; > + nand-ecc-strength = <16>; > + nand-ecc-step-size = <1024>; > + > + partition@0 { > + label = "nand_text"; > + reg = <0x00000000 0x00400000>; > + }; > + > + partition@00400000 { > + label = "nand_monitor"; > + reg = <0x00400000 0x00400000>; > + }; > + > + partition@00800000 { > + label = "nand_kernel"; > + reg = <0x00800000 0x00800000>; > + }; > + > + partition@01000000 { > + label = "nand_fs"; > + reg = <0x01000000 0x1f000000>; > + }; > + }; > }; > }; > diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi > index 2388145..ac32fce 100644 > --- a/arch/arm/boot/dts/hip04.dtsi > +++ b/arch/arm/boot/dts/hip04.dtsi > @@ -269,6 +269,13 @@ > interrupts = <0 372 4>; > }; > > + nand: nand@4020000 { > + compatible = "hisilicon,504-nfc"; > + reg = <0x4020000 0x10000>, <0x5000000 0x1000>; > + interrupts = <0 379 4>; > + #address-cells = <1>; > + #size-cells = <1>; > + }; > }; > > etb@0,e3c42000 { > -- > 1.9.1 > Acked-by: Haojian Zhuang <haojian.zhuang-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 5+ messages in thread
[parent not found: <CAD6h2NQr_Z600vC+7RRuLgoGvV4MCXz8TAd4C5eCnqbA0ZdPWw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>]
* Re: [RESEND PATCH v3] mtd: hisilicon: add device tree node for NAND controller [not found] ` <CAD6h2NQr_Z600vC+7RRuLgoGvV4MCXz8TAd4C5eCnqbA0ZdPWw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> @ 2015-03-26 4:53 ` Zhou Wang 0 siblings, 0 replies; 5+ messages in thread From: Zhou Wang @ 2015-03-26 4:53 UTC (permalink / raw) To: Haojian Zhuang Cc: Wei Xu, Brian Norris, Arnd Bergmann, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Liguozhu (Kenneth) On 2015/3/26 10:13, Haojian Zhuang wrote: > On 25 March 2015 at 15:04, Zhou Wang <wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org> wrote: >> This patch adds dts support for NAND flash controller of Hisilicon Soc Hip04. >> Now it is based on v4.0-rc5 >> >> Changes in v3: >> - Change E-mail address in signed-off-by to "wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org" >> Changes in v2: >> - Base on v3.19-rc1 >> - Use nand-ecc-strength, nand-ecc-step-size to replace hisi,nand-ecc-bits >> Changes in v1: >> - Move partition and other board related information into board dts file: >> hip04-d01.dts >> >> Signed-off-by: Zhou Wang <wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org> >> --- >> arch/arm/boot/dts/hip04-d01.dts | 27 +++++++++++++++++++++++++++ >> arch/arm/boot/dts/hip04.dtsi | 7 +++++++ >> 2 files changed, 34 insertions(+) >> >> diff --git a/arch/arm/boot/dts/hip04-d01.dts b/arch/arm/boot/dts/hip04-d01.dts >> index 40a9e33..ba04dd5 100644 >> --- a/arch/arm/boot/dts/hip04-d01.dts >> +++ b/arch/arm/boot/dts/hip04-d01.dts >> @@ -28,5 +28,32 @@ >> uart0: uart@4007000 { >> status = "ok"; >> }; >> + >> + nand: nand@4020000 { >> + nand-bus-width = <8>; >> + nand-ecc-mode = "hw"; >> + nand-ecc-strength = <16>; >> + nand-ecc-step-size = <1024>; >> + >> + partition@0 { >> + label = "nand_text"; >> + reg = <0x00000000 0x00400000>; >> + }; >> + >> + partition@00400000 { >> + label = "nand_monitor"; >> + reg = <0x00400000 0x00400000>; >> + }; >> + >> + partition@00800000 { >> + label = "nand_kernel"; >> + reg = <0x00800000 0x00800000>; >> + }; >> + >> + partition@01000000 { >> + label = "nand_fs"; >> + reg = <0x01000000 0x1f000000>; >> + }; >> + }; >> }; >> }; >> diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi >> index 2388145..ac32fce 100644 >> --- a/arch/arm/boot/dts/hip04.dtsi >> +++ b/arch/arm/boot/dts/hip04.dtsi >> @@ -269,6 +269,13 @@ >> interrupts = <0 372 4>; >> }; >> >> + nand: nand@4020000 { >> + compatible = "hisilicon,504-nfc"; >> + reg = <0x4020000 0x10000>, <0x5000000 0x1000>; >> + interrupts = <0 379 4>; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + }; >> }; >> >> etb@0,e3c42000 { >> -- >> 1.9.1 >> > > Acked-by: Haojian Zhuang <haojian.zhuang-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> > > . > Thanks! Zhou Wang -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [RESEND PATCH v3] mtd: hisilicon: add device tree node for NAND controller [not found] ` <1427267091-227474-1-git-send-email-wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org> 2015-03-26 2:13 ` Haojian Zhuang @ 2015-03-27 17:35 ` Brian Norris 2015-03-28 7:00 ` Zhou Wang 1 sibling, 1 reply; 5+ messages in thread From: Brian Norris @ 2015-03-27 17:35 UTC (permalink / raw) To: Zhou Wang Cc: Haojian Zhuang, Wei Xu, Arnd Bergmann, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA, liguozhu-C8/M+/jPZTeaMJb+Lgu22Q This would go through your arm-soc submaintainer; i.e., Wei Xu But FWIW... On Wed, Mar 25, 2015 at 03:04:51PM +0800, Zhou Wang wrote: > This patch adds dts support for NAND flash controller of Hisilicon Soc Hip04. > Now it is based on v4.0-rc5 > > Changes in v3: > - Change E-mail address in signed-off-by to "wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org" > Changes in v2: > - Base on v3.19-rc1 > - Use nand-ecc-strength, nand-ecc-step-size to replace hisi,nand-ecc-bits > Changes in v1: > - Move partition and other board related information into board dts file: > hip04-d01.dts > > Signed-off-by: Zhou Wang <wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org> > --- > arch/arm/boot/dts/hip04-d01.dts | 27 +++++++++++++++++++++++++++ > arch/arm/boot/dts/hip04.dtsi | 7 +++++++ > 2 files changed, 34 insertions(+) > > diff --git a/arch/arm/boot/dts/hip04-d01.dts b/arch/arm/boot/dts/hip04-d01.dts > index 40a9e33..ba04dd5 100644 > --- a/arch/arm/boot/dts/hip04-d01.dts > +++ b/arch/arm/boot/dts/hip04-d01.dts > @@ -28,5 +28,32 @@ > uart0: uart@4007000 { > status = "ok"; > }; > + > + nand: nand@4020000 { > + nand-bus-width = <8>; > + nand-ecc-mode = "hw"; > + nand-ecc-strength = <16>; > + nand-ecc-step-size = <1024>; > + > + partition@0 { > + label = "nand_text"; > + reg = <0x00000000 0x00400000>; > + }; > + > + partition@00400000 { > + label = "nand_monitor"; > + reg = <0x00400000 0x00400000>; > + }; > + > + partition@00800000 { > + label = "nand_kernel"; > + reg = <0x00800000 0x00800000>; > + }; > + > + partition@01000000 { > + label = "nand_fs"; > + reg = <0x01000000 0x1f000000>; > + }; > + }; > }; > }; > diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi > index 2388145..ac32fce 100644 > --- a/arch/arm/boot/dts/hip04.dtsi > +++ b/arch/arm/boot/dts/hip04.dtsi > @@ -269,6 +269,13 @@ > interrupts = <0 372 4>; > }; > > + nand: nand@4020000 { > + compatible = "hisilicon,504-nfc"; > + reg = <0x4020000 0x10000>, <0x5000000 0x1000>; > + interrupts = <0 379 4>; > + #address-cells = <1>; > + #size-cells = <1>; > + }; Seems reasonable and matches the binding we already accepted, so: Reviewed-by: Brian Norris <computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> > }; > > etb@0,e3c42000 { > -- > 1.9.1 > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [RESEND PATCH v3] mtd: hisilicon: add device tree node for NAND controller 2015-03-27 17:35 ` Brian Norris @ 2015-03-28 7:00 ` Zhou Wang 0 siblings, 0 replies; 5+ messages in thread From: Zhou Wang @ 2015-03-28 7:00 UTC (permalink / raw) To: Brian Norris Cc: Haojian Zhuang, Wei Xu, Arnd Bergmann, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA, liguozhu-C8/M+/jPZTeaMJb+Lgu22Q On 2015/3/28 1:35, Brian Norris wrote: > This would go through your arm-soc submaintainer; i.e., Wei Xu > > But FWIW... Yes, I will ping him to check the patch. > > On Wed, Mar 25, 2015 at 03:04:51PM +0800, Zhou Wang wrote: >> This patch adds dts support for NAND flash controller of Hisilicon Soc Hip04. >> Now it is based on v4.0-rc5 >> >> Changes in v3: >> - Change E-mail address in signed-off-by to "wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org" >> Changes in v2: >> - Base on v3.19-rc1 >> - Use nand-ecc-strength, nand-ecc-step-size to replace hisi,nand-ecc-bits >> Changes in v1: >> - Move partition and other board related information into board dts file: >> hip04-d01.dts >> >> Signed-off-by: Zhou Wang <wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org> >> --- >> arch/arm/boot/dts/hip04-d01.dts | 27 +++++++++++++++++++++++++++ >> arch/arm/boot/dts/hip04.dtsi | 7 +++++++ >> 2 files changed, 34 insertions(+) >> >> diff --git a/arch/arm/boot/dts/hip04-d01.dts b/arch/arm/boot/dts/hip04-d01.dts >> index 40a9e33..ba04dd5 100644 >> --- a/arch/arm/boot/dts/hip04-d01.dts >> +++ b/arch/arm/boot/dts/hip04-d01.dts >> @@ -28,5 +28,32 @@ >> uart0: uart@4007000 { >> status = "ok"; >> }; >> + >> + nand: nand@4020000 { >> + nand-bus-width = <8>; >> + nand-ecc-mode = "hw"; >> + nand-ecc-strength = <16>; >> + nand-ecc-step-size = <1024>; >> + >> + partition@0 { >> + label = "nand_text"; >> + reg = <0x00000000 0x00400000>; >> + }; >> + >> + partition@00400000 { >> + label = "nand_monitor"; >> + reg = <0x00400000 0x00400000>; >> + }; >> + >> + partition@00800000 { >> + label = "nand_kernel"; >> + reg = <0x00800000 0x00800000>; >> + }; >> + >> + partition@01000000 { >> + label = "nand_fs"; >> + reg = <0x01000000 0x1f000000>; >> + }; >> + }; >> }; >> }; >> diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi >> index 2388145..ac32fce 100644 >> --- a/arch/arm/boot/dts/hip04.dtsi >> +++ b/arch/arm/boot/dts/hip04.dtsi >> @@ -269,6 +269,13 @@ >> interrupts = <0 372 4>; >> }; >> >> + nand: nand@4020000 { >> + compatible = "hisilicon,504-nfc"; >> + reg = <0x4020000 0x10000>, <0x5000000 0x1000>; >> + interrupts = <0 379 4>; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + }; > > Seems reasonable and matches the binding we already accepted, so: > > Reviewed-by: Brian Norris <computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> > Thanks, Zhou >> }; >> >> etb@0,e3c42000 { >> -- >> 1.9.1 >> > > . > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 5+ messages in thread
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2015-03-25 7:04 [RESEND PATCH v3] mtd: hisilicon: add device tree node for NAND controller Zhou Wang
[not found] ` <1427267091-227474-1-git-send-email-wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
2015-03-26 2:13 ` Haojian Zhuang
[not found] ` <CAD6h2NQr_Z600vC+7RRuLgoGvV4MCXz8TAd4C5eCnqbA0ZdPWw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-03-26 4:53 ` Zhou Wang
2015-03-27 17:35 ` Brian Norris
2015-03-28 7:00 ` Zhou Wang
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