From: Baruch Siach <baruch-NswTu9S1W3P6gbPvEgmw2w@public.gmane.org>
To: Miquel Raynal
<miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Cc: Zhang Rui <rui.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>,
Eduardo Valentin
<edubezval-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>,
Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>,
Gregory Clement
<gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
Sebastian Hesselbarth
<sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>,
Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>,
linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Thomas Petazzoni
<thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
Antoine Tenart
<antoine.tenart-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
Nadav Haklai <nadavh-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>,
David Sniatkiwicz
<davidsn-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
Subject: Re: [PATCH v3 03/11] thermal: armada: Simplify the check of the validity bit
Date: Fri, 15 Dec 2017 10:33:16 +0200 [thread overview]
Message-ID: <20171215083316.4xswddwbcijxhuxn@tarshish> (raw)
In-Reply-To: <20171214103011.24713-4-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Hi Miquel,
On Thu, Dec 14, 2017 at 11:30:03AM +0100, Miquel Raynal wrote:
> All Armada SoCs use one bit to declare if the sensor values are valid.
> This bit moves across the versions of the IP.
>
> The method until then was to do both a shift and compare with an useless
> flag of "0x1". It is clearer and quicker to directly save the value that
> must be ANDed instead of the bit position and do a single bitwise AND
> operation.
>
> Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> ---
> drivers/thermal/armada_thermal.c | 12 +++++-------
> 1 file changed, 5 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/thermal/armada_thermal.c b/drivers/thermal/armada_thermal.c
> index 6c4af2622d4f..26698f2d3ca7 100644
> --- a/drivers/thermal/armada_thermal.c
> +++ b/drivers/thermal/armada_thermal.c
> @@ -24,8 +24,6 @@
> #include <linux/of_device.h>
> #include <linux/thermal.h>
>
> -#define THERMAL_VALID_MASK 0x1
> -
> /* Thermal Manager Control and Status Register */
> #define PMU_TDC0_SW_RST_MASK (0x1 << 1)
> #define PMU_TM_DISABLE_OFFS 0
> @@ -67,7 +65,7 @@ struct armada_thermal_data {
> /* Register shift and mask to access the sensor temperature */
> unsigned int temp_shift;
> unsigned int temp_mask;
> - unsigned int is_valid_shift;
> + unsigned int is_valid_bit;
Type should be u32 now, I think.
> };
>
> static void armadaxp_init_sensor(struct platform_device *pdev,
> @@ -151,7 +149,7 @@ static bool armada_is_valid(struct armada_thermal_priv *priv)
> {
> unsigned long reg = readl_relaxed(priv->sensor);
u32 here also, I think. But that's unrelated to this patch.
> - return (reg >> priv->data->is_valid_shift) & THERMAL_VALID_MASK;
> + return reg & priv->data->is_valid_bit;
> }
>
> static int armada_get_temp(struct thermal_zone_device *thermal,
> @@ -199,7 +197,7 @@ static const struct armada_thermal_data armadaxp_data = {
> static const struct armada_thermal_data armada370_data = {
> .is_valid = armada_is_valid,
> .init_sensor = armada370_init_sensor,
> - .is_valid_shift = 9,
> + .is_valid_bit = BIT(9),
> .temp_shift = 10,
> .temp_mask = 0x1ff,
> .coef_b = 3153000000UL,
> @@ -210,7 +208,7 @@ static const struct armada_thermal_data armada370_data = {
> static const struct armada_thermal_data armada375_data = {
> .is_valid = armada_is_valid,
> .init_sensor = armada375_init_sensor,
> - .is_valid_shift = 10,
> + .is_valid_bit = BIT(10),
> .temp_shift = 0,
> .temp_mask = 0x1ff,
> .coef_b = 3171900000UL,
> @@ -221,7 +219,7 @@ static const struct armada_thermal_data armada375_data = {
> static const struct armada_thermal_data armada380_data = {
> .is_valid = armada_is_valid,
> .init_sensor = armada380_init_sensor,
> - .is_valid_shift = 10,
> + .is_valid_bit = BIT(10),
> .temp_shift = 0,
> .temp_mask = 0x3ff,
> .coef_b = 1172499100UL,
baruch
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next prev parent reply other threads:[~2017-12-15 8:33 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-14 10:30 [PATCH v3 00/11] Armada thermal: improvements and A7K/A8K SoCs support Miquel Raynal
2017-12-14 10:30 ` [PATCH v3 01/11] dt-bindings: thermal: Describe Armada AP806 and CP110 Miquel Raynal
[not found] ` <20171214103011.24713-2-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-15 8:27 ` Baruch Siach
2017-12-15 8:32 ` Miquel RAYNAL
2017-12-15 8:44 ` Baruch Siach
2017-12-15 8:44 ` Gregory CLEMENT
[not found] ` <87po7gmlcs.fsf-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-15 10:52 ` Miquel RAYNAL
2017-12-15 23:28 ` Rob Herring
2017-12-16 12:50 ` Miquel RAYNAL
2017-12-14 10:30 ` [PATCH v3 02/11] thermal: armada: Use msleep for long delays Miquel Raynal
2017-12-14 10:51 ` Gregory CLEMENT
[not found] ` <20171214103011.24713-1-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-14 10:30 ` [PATCH v3 03/11] thermal: armada: Simplify the check of the validity bit Miquel Raynal
2017-12-14 10:52 ` Gregory CLEMENT
[not found] ` <20171214103011.24713-4-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-15 8:33 ` Baruch Siach [this message]
2017-12-15 10:56 ` Miquel RAYNAL
2017-12-14 10:30 ` [PATCH v3 04/11] thermal: armada: Rationalize register accesses Miquel Raynal
2017-12-15 8:56 ` Baruch Siach
2017-12-18 13:48 ` Miquel RAYNAL
[not found] ` <20171214103011.24713-5-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-14 10:55 ` Gregory CLEMENT
2017-12-16 22:18 ` Baruch Siach
2017-12-17 22:02 ` Baruch Siach
2017-12-18 12:37 ` Miquel RAYNAL
2017-12-14 10:30 ` [PATCH v3 05/11] thermal: armada: Add support for Armada AP806 Miquel Raynal
[not found] ` <20171214103011.24713-6-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-14 11:05 ` Gregory CLEMENT
2017-12-18 9:41 ` Miquel RAYNAL
2017-12-18 11:11 ` Baruch Siach
2017-12-18 12:25 ` Miquel RAYNAL
2017-12-16 22:22 ` Baruch Siach
2017-12-14 10:30 ` [PATCH v3 08/11] thermal: armada: Change sensors trim default value Miquel Raynal
2017-12-14 10:30 ` [PATCH v3 06/11] thermal: armada: Add support for Armada CP110 Miquel Raynal
[not found] ` <20171214103011.24713-7-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-14 11:11 ` Gregory CLEMENT
[not found] ` <87tvwto96y.fsf-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-14 11:33 ` Miquel RAYNAL
2017-12-14 11:37 ` Gregory CLEMENT
[not found] ` <87a7ylo803.fsf-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-14 12:24 ` Miquel RAYNAL
2017-12-14 10:30 ` [PATCH v3 07/11] thermal: armada: Update Kconfig and module description Miquel Raynal
[not found] ` <20171214103011.24713-8-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-14 11:13 ` Gregory CLEMENT
[not found] ` <87po7ho93k.fsf-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-14 11:17 ` Miquel RAYNAL
2017-12-14 11:30 ` Gregory CLEMENT
2017-12-14 11:36 ` Miquel RAYNAL
2017-12-14 13:10 ` Thomas Petazzoni
2017-12-14 10:30 ` [PATCH v3 09/11] thermal: armada: Wait sensors validity before exiting the init callback Miquel Raynal
2017-12-14 11:23 ` Gregory CLEMENT
2017-12-14 11:27 ` Miquel RAYNAL
2017-12-14 10:30 ` [PATCH v3 10/11] thermal: armada: Give useful names to the thermal zone Miquel Raynal
2017-12-14 10:30 ` [PATCH v3 11/11] ARM64: dts: marvell: Add thermal support for A7K/A8K Miquel Raynal
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