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From: Maxime Ripard <maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>
To: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
Cc: Yong Deng <yong.deng-+3dxTMOEIRNWk0Htik3J/w@public.gmane.org>,
	Mauro Carvalho Chehab
	<mchehab-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
	linux-media-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-sunxi <linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org>,
	linux-amarula-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org,
	Michael Trimarchi
	<michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
Subject: Re: [PATCH v3 3/6] media: sun6i: Set 300MHz mod clock for A64
Date: Tue, 11 Dec 2018 16:44:27 +0100	[thread overview]
Message-ID: <20181211154427.uekytnmp2wlgxwm2@flea> (raw)
In-Reply-To: <20181210115246.8188-4-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>

[-- Attachment #1: Type: text/plain, Size: 1290 bytes --]

On Mon, Dec 10, 2018 at 05:22:43PM +0530, Jagan Teki wrote:
> The default CSI_SCLK seems unable to drive the sensor to capture
> the image, so update it to working clock rate 300MHz for A64.
> 
> Signed-off-by: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> ---
>  drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
> index bbe45e893722..4b872800b244 100644
> --- a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
> +++ b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
> @@ -822,6 +822,11 @@ static int sun6i_csi_resource_request(struct sun6i_csi_dev *sdev,
>  		return PTR_ERR(sdev->clk_mod);
>  	}
>  
> +	/* A64 need 300MHz mod clock to operate properly */
> +	if (of_device_is_compatible(pdev->dev.of_node,
> +				    "allwinner,sun50i-a64-csi"))
> +		clk_set_rate_exclusive(sdev->clk_mod, 300000000);
> +

Where is that 300MHz coming from? You claim in your comment that it
"operates properly", yet in your previous mail about this, you were
saying that 1080p @30Hz is broken. Which one is it?

Maxime

-- 
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

  parent reply	other threads:[~2018-12-11 15:44 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-10 11:52 [PATCH v3 0/6] media/sun6i: Allwinner A64 CSI support Jagan Teki
     [not found] ` <20181210115246.8188-1-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
2018-12-10 11:52   ` [PATCH v3 1/6] dt-bindings: media: sun6i: Add A64 CSI compatible Jagan Teki
2018-12-10 23:24     ` Rob Herring
2018-12-10 11:52   ` [PATCH v3 2/6] media: sun6i: Add A64 compatible support Jagan Teki
     [not found]     ` <20181210115246.8188-3-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
2018-12-11 15:43       ` Maxime Ripard
2018-12-10 11:52   ` [PATCH v3 3/6] media: sun6i: Set 300MHz mod clock for A64 Jagan Teki
     [not found]     ` <20181210115246.8188-4-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
2018-12-11 15:44       ` Maxime Ripard [this message]
2018-12-11 15:50         ` Jagan Teki
2018-12-10 11:52   ` [PATCH v3 4/6] arm64: dts: allwinner: a64: Add A64 CSI controller Jagan Teki
2018-12-10 11:52   ` [PATCH v3 5/6] arm64: dts: allwinner: a64: Add pinmux setting for CSI MCLK on PE1 Jagan Teki
2018-12-10 11:52   ` [PATCH v3 6/6] arm64: dts: allwinner: a64-amarula-relic: Add OV5640 camera node Jagan Teki

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