From: Conor Dooley <conor@kernel.org>
To: linux-riscv@lists.infradead.org
Cc: conor@kernel.org, Conor Dooley <conor.dooley@microchip.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Heiko Stuebner <heiko@sntech.de>,
Andrew Jones <ajones@ventanamicro.com>,
Sunil V L <sunilvl@ventanamicro.com>,
Yangyu Chen <cyy@cyyself.name>,
devicetree@vger.kernel.org
Subject: [RFC 5/6] RISC-V: drop a needless check in print_isa_ext()
Date: Mon, 8 May 2023 19:16:25 +0100 [thread overview]
Message-ID: <20230508-strenuous-mustiness-412fdf2402b0@spud> (raw)
In-Reply-To: <20230508-hypnotic-phobia-99598439d828@spud>
From: Conor Dooley <conor.dooley@microchip.com>
There'll always be elements in the array, even if none of the
optional bits of support are built into the kernel.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
arch/riscv/kernel/cpu.c | 9 +--------
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
index c29643dca0f7..bc32207b7d86 100644
--- a/arch/riscv/kernel/cpu.c
+++ b/arch/riscv/kernel/cpu.c
@@ -176,15 +176,8 @@ arch_initcall(riscv_cpuinfo_init);
#ifdef CONFIG_PROC_FS
static void print_isa_ext(struct seq_file *f)
{
- int i = 0, arr_sz;
- arr_sz = riscv_isa_extensions_count - 1;
-
- /* No extension support available */
- if (arr_sz <= 0)
- return;
-
- for (i = 0; i < arr_sz; i++) {
+ for (int i = 0; i < riscv_isa_extensions_count - 1; i++) {
if (!__riscv_isa_extension_available(NULL, riscv_isa_extensions[i].key))
continue;
if (riscv_isa_extensions[i].multi_letter)
--
2.39.2
next prev parent reply other threads:[~2023-05-08 18:17 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-08 18:16 [RFC 0/6] Deprecate riscv,isa DT property? Conor Dooley
2023-05-08 18:16 ` [RFC 1/6] dt-bindings: riscv: clarify what an unversioned extension means Conor Dooley
2023-05-13 17:46 ` Krzysztof Kozlowski
2023-05-08 18:16 ` [RFC 2/6] dt-bindings: riscv: add riscv,isa-extension-* property and incompatible example Conor Dooley
2023-05-13 17:50 ` Krzysztof Kozlowski
2023-05-13 18:00 ` Conor Dooley
2023-05-08 18:16 ` [RFC 3/6] RISC-V: deprecate riscv,isa & replace it with per-extension properties Conor Dooley
2023-05-08 18:16 ` [RFC 4/6] RISC-V: add support for riscv,isa-base property Conor Dooley
2023-05-08 18:16 ` Conor Dooley [this message]
2023-05-08 18:16 ` [RFC 6/6] riscv: dts: microchip: use new riscv,isa-extension-* properties for mpfs Conor Dooley
2023-05-11 21:27 ` [RFC 0/6] Deprecate riscv,isa DT property? Atish Patra
2023-05-11 21:47 ` Conor Dooley
2023-05-11 22:34 ` Atish Patra
2023-05-11 22:38 ` Conor Dooley
2023-05-12 18:01 ` Palmer Dabbelt
2023-05-12 19:40 ` Conor Dooley
2023-05-12 22:05 ` Conor Dooley
2023-05-12 23:20 ` Atish Patra
2023-05-12 23:52 ` Conor Dooley
2023-05-12 23:55 ` Palmer Dabbelt
2023-05-13 0:09 ` Conor Dooley
2023-05-13 0:38 ` Palmer Dabbelt
2023-05-13 7:47 ` Anup Patel
2023-05-13 21:34 ` Jessica Clarke
2023-05-13 21:54 ` Conor Dooley
2023-05-15 4:38 ` Sunil V L
2023-05-15 7:52 ` Conor Dooley
2023-05-12 18:08 ` Palmer Dabbelt
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