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From: Conor Dooley <conor@kernel.org>
To: palmer@dabbelt.com
Cc: conor@kernel.org, Conor Dooley <conor.dooley@microchip.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Andrew Jones <ajones@ventanamicro.com>,
	Sunil V L <sunilvl@ventanamicro.com>,
	Yangyu Chen <cyy@cyyself.name>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	devicetree@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: [PATCH v3 5/7] RISC-V: remove decrement/increment dance in ISA string parser
Date: Wed,  7 Jun 2023 21:28:29 +0100	[thread overview]
Message-ID: <20230607-estate-left-f20faabefb89@spud> (raw)
In-Reply-To: <20230607-audacity-overhaul-82bb867a825f@spud>

From: Conor Dooley <conor.dooley@microchip.com>

While expanding on the comments in the ISA string parsing code, I
noticed that the conditional decrement of `isa` at the end of the loop
was a bit odd.
The parsing code expects that at the start of the for loop, `isa` will
point to the first character of the next unparsed extension.
However, depending on what the next extension is, this may not be true.
Unless the next extension is a multi-letter extension preceded by an
underscore, `isa` will either point to the string's null-terminator or
to the first character of the next extension, once the switch statement
has been evaluated.
Obviously incrementing `isa` at the end of the loop could cause it to
increment past the null terminator or miss a single letter extension, so
`isa` is conditionally decremented, just so that the loop can increment
it again.

It's easier to understand the code if, instead of this decrement +
increment dance, we instead use a while loop & rely on the handling of
individual extension types to leave `isa` pointing to the first
character of the next extension.
As already mentioned, this won't be the case where the following
extension is multi-letter & preceded by an underscore. To handle that,
invert the check and increment rather than decrement.
Hopefully this eliminates a "huh?!?" moment the next time somebody tries
to understand this code.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/kernel/cpufeature.c | 14 ++++++--------
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
index 7dd4589e79a4..84dc44a3e6e5 100644
--- a/arch/riscv/kernel/cpufeature.c
+++ b/arch/riscv/kernel/cpufeature.c
@@ -157,7 +157,7 @@ void __init riscv_fill_hwcap(void)
 		isa += 4;
 
 		bitmap_zero(this_isa, RISCV_ISA_EXT_MAX);
-		for (; *isa; ++isa) {
+		while (*isa) {
 			const char *ext = isa++;
 			const char *ext_end = isa;
 			bool ext_long = false, ext_err = false;
@@ -270,14 +270,12 @@ void __init riscv_fill_hwcap(void)
 
 			/*
 			 * The parser expects that at the start of an iteration isa points to the
-			 * character before the start of the next extension. This will not be the
-			 * case if we have just parsed a single-letter extension and the next
-			 * extension is not a multi-letter extension prefixed with an "_". It is
-			 * also not the case at the end of the string, where it will point to the
-			 * terminating null character.
+			 * first character of the next extension. As we stop parsing an extension
+			 * on meeting a non-alphanumeric character, an extra increment is needed
+			 * where the succeeding extension is a multi-letter prefixed with an "_".
 			 */
-			if (*isa != '_')
-				--isa;
+			if (*isa == '_')
+				++isa;
 
 #define SET_ISA_EXT_MAP(name, bit)							\
 			do {								\
-- 
2.39.2


  parent reply	other threads:[~2023-06-07 20:29 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-07 20:28 [PATCH v3 0/7] ISA string parser cleanups Conor Dooley
2023-06-07 20:28 ` [PATCH v3 1/7] RISC-V: simplify register width check in ISA string parsing Conor Dooley
2023-06-12  7:07   ` Sunil V L
2023-06-07 20:28 ` [PATCH v3 2/7] RISC-V: split early & late of_node to hartid mapping Conor Dooley
2023-06-12  7:31   ` Sunil V L
2023-06-07 20:28 ` [PATCH v3 3/7] RISC-V: validate riscv,isa at boot, not during ISA string parsing Conor Dooley
2023-06-12  7:33   ` Sunil V L
2023-06-07 20:28 ` [PATCH v3 4/7] RISC-V: rework comments in ISA string parser Conor Dooley
2023-06-07 20:28 ` Conor Dooley [this message]
2023-06-12  7:52   ` [PATCH v3 5/7] RISC-V: remove decrement/increment dance " Sunil V L
2023-06-07 20:28 ` [PATCH v3 6/7] dt-bindings: riscv: explicitly mention assumption of Zicntr & Zihpm support Conor Dooley
2023-06-14 23:02   ` Rob Herring
2023-06-07 20:28 ` [PATCH v3 7/7] RISC-V: always report presence of extensions formerly part of the base ISA Conor Dooley
2023-06-25 23:17 ` [PATCH v3 0/7] ISA string parser cleanups Palmer Dabbelt
2023-06-25 23:20 ` patchwork-bot+linux-riscv

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