[PATCH 0/6] Add RZ/G2UL MTU3a support

[PATCH 0/6] Add RZ/G2UL MTU3a support

[Biju Das]

This patch series aims to add MTU3a support for RZ/G2UL SMARC EVK.

Biju Das (6):
  dt-bindings: timer: renesas,rz-mtu3: Improve documentation
  dt-bindings: timer: renesas,rz-mtu3: Fix overflow/underflow interrupt
    names
  dt-bindings: timer: renesas,rz-mtu3: Document RZ/G2UL SoC
  arm64: dts: renesas: r9a07g044: Update overfow/underflow IRQ names for
    MTU3 channels
  arm64: dts: renesas: r9a07g043: Add MTU3a node
  arm64: dts: renesas: rzg2ul-smarc: Add support for enabling MTU3

 .../bindings/timer/renesas,rz-mtu3.yaml       | 67 +++++++++---------
 arch/arm64/boot/dts/renesas/r9a07g043.dtsi    | 70 +++++++++++++++++++
 .../boot/dts/renesas/r9a07g043u11-smarc.dts   | 11 +++
 arch/arm64/boot/dts/renesas/r9a07g044.dtsi    | 16 ++---
 arch/arm64/boot/dts/renesas/r9a07g054.dtsi    | 16 ++---
 .../dts/renesas/rzg2ul-smarc-pinfunction.dtsi |  6 ++
 arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi | 13 ++++
 7 files changed, 150 insertions(+), 49 deletions(-)

-- 
2.25.1

[PATCH 1/6] dt-bindings: timer: renesas,rz-mtu3: Improve documentation

[Biju Das]

Fix the documentation issues pointed by Pavel while backporting
it to 6.1.y-cip.
 - Replace '32- bit'->'32-bit'
 - Consistently remove '.' at the end of line for the specifications
 - Replace '          (excluding MTU8)'-> '(excluding MTU8)'

Reported-by: Pavel Machek <pavel@denx.de>
Closes: https://patchwork.kernel.org/project/cip-dev/patch/20230606075235.183132-3-biju.das.jz@bp.renesas.com/
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
v1->v2:
 * Added Ack by Conor Dooley
---
 .../bindings/timer/renesas,rz-mtu3.yaml       | 28 +++++++++----------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml b/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml
index bffdab0b0185..eb2d5ebe4df0 100644
--- a/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml
+++ b/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml
@@ -11,8 +11,8 @@ maintainers:
 
 description: |
   This hardware block consists of eight 16-bit timer channels and one
-  32- bit timer channel. It supports the following specifications:
-    - Pulse input/output: 28 lines max.
+  32-bit timer channel. It supports the following specifications:
+    - Pulse input/output: 28 lines max
     - Pulse input 3 lines
     - Count clock 11 clocks for each channel (14 clocks for MTU0, 12 clocks
       for MTU2, and 10 clocks for MTU5, four clocks for MTU1-MTU2 combination
@@ -23,11 +23,11 @@ description: |
         - Input capture function (noise filter setting available)
         - Counter-clearing operation
         - Simultaneous writing to multiple timer counters (TCNT)
-          (excluding MTU8).
+          (excluding MTU8)
         - Simultaneous clearing on compare match or input capture
-          (excluding MTU8).
+          (excluding MTU8)
         - Simultaneous input and output to registers in synchronization with
-          counter operations           (excluding MTU8).
+          counter operations (excluding MTU8)
         - Up to 12-phase PWM output in combination with synchronous operation
           (excluding MTU8)
     - [MTU0 MTU3, MTU4, MTU6, MTU7, and MTU8]
@@ -40,26 +40,26 @@ description: |
     - [MTU3, MTU4, MTU6, and MTU7]
         - Through interlocked operation of MTU3/4 and MTU6/7, the positive and
           negative signals in six phases (12 phases in total) can be output in
-          complementary PWM and reset-synchronized PWM operation.
+          complementary PWM and reset-synchronized PWM operation
         - In complementary PWM mode, values can be transferred from buffer
           registers to temporary registers at crests and troughs of the timer-
           counter values or when the buffer registers (TGRD registers in MTU4
-          and MTU7) are written to.
-        - Double-buffering selectable in complementary PWM mode.
+          and MTU7) are written to
+        - Double-buffering selectable in complementary PWM mode
     - [MTU3 and MTU4]
         - Through interlocking with MTU0, a mode for driving AC synchronous
           motors (brushless DC motors) by using complementary PWM output and
           reset-synchronized PWM output is settable and allows the selection
-          of two types of waveform output (chopping or level).
+          of two types of waveform output (chopping or level)
     - [MTU5]
-        - Capable of operation as a dead-time compensation counter.
+        - Capable of operation as a dead-time compensation counter
     - [MTU0/MTU5, MTU1, MTU2, and MTU8]
         - 32-bit phase counting mode specifiable by combining MTU1 and MTU2 and
-          through interlocked operation with MTU0/MTU5 and MTU8.
+          through interlocked operation with MTU0/MTU5 and MTU8
     - Interrupt-skipping function
         - In complementary PWM mode, interrupts on crests and troughs of counter
           values and triggers to start conversion by the A/D converter can be
-          skipped.
+          skipped
     - Interrupt sources: 43 sources.
     - Buffer operation:
         - Automatic transfer of register data (transfer from the buffer
@@ -68,9 +68,9 @@ description: |
         - A/D converter start triggers can be generated
         - A/D converter start request delaying function enables A/D converter
           to be started with any desired timing and to be synchronized with
-          PWM output.
+          PWM output
     - Low power consumption function
-        - The MTU3a can be placed in the module-stop state.
+        - The MTU3a can be placed in the module-stop state
 
     There are two phase counting modes. 16-bit phase counting mode in which
     MTU1 and MTU2 operate independently, and cascade connection 32-bit phase
-- 
2.25.1

[PATCH 2/6] dt-bindings: timer: renesas,rz-mtu3: Fix overflow/underflow interrupt names

[Biju Das]

As per R01UH0914EJ0130 Rev.1.30 HW manual the MTU3 overflow/underflow
interrupt names starts with 'tci' instead of 'tgi'.

Fix this documentation issue by replacing below overflow/underflow
interrupt names:
 - tgiv0->tciv0
 - tgiv1->tciv1
 - tgiu1->tciu1
 - tgiv2->tciv2
 - tgiu2->tciu2
 - tgiv3->tciv3
 - tgiv4->tciv4
 - tgiv6->tciv6
 - tgiv7->tciv7
 - tgiv8->tciv8
 - tgiu8->tciu8

Fixes: 0a9d6b54297e ("dt-bindings: timer: Document RZ/G2L MTU3a bindings")
Cc: stable@kernel.org
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 .../bindings/timer/renesas,rz-mtu3.yaml       | 38 +++++++++----------
 1 file changed, 19 insertions(+), 19 deletions(-)

diff --git a/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml b/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml
index eb2d5ebe4df0..670a2ebaacdb 100644
--- a/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml
+++ b/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml
@@ -169,27 +169,27 @@ properties:
       - const: tgib0
       - const: tgic0
       - const: tgid0
-      - const: tgiv0
+      - const: tciv0
       - const: tgie0
       - const: tgif0
       - const: tgia1
       - const: tgib1
-      - const: tgiv1
-      - const: tgiu1
+      - const: tciv1
+      - const: tciu1
       - const: tgia2
       - const: tgib2
-      - const: tgiv2
-      - const: tgiu2
+      - const: tciv2
+      - const: tciu2
       - const: tgia3
       - const: tgib3
       - const: tgic3
       - const: tgid3
-      - const: tgiv3
+      - const: tciv3
       - const: tgia4
       - const: tgib4
       - const: tgic4
       - const: tgid4
-      - const: tgiv4
+      - const: tciv4
       - const: tgiu5
       - const: tgiv5
       - const: tgiw5
@@ -197,18 +197,18 @@ properties:
       - const: tgib6
       - const: tgic6
       - const: tgid6
-      - const: tgiv6
+      - const: tciv6
       - const: tgia7
       - const: tgib7
       - const: tgic7
       - const: tgid7
-      - const: tgiv7
+      - const: tciv7
       - const: tgia8
       - const: tgib8
       - const: tgic8
       - const: tgid8
-      - const: tgiv8
-      - const: tgiu8
+      - const: tciv8
+      - const: tciu8
 
   clocks:
     maxItems: 1
@@ -285,16 +285,16 @@ examples:
                    <GIC_SPI 211 IRQ_TYPE_EDGE_RISING>,
                    <GIC_SPI 212 IRQ_TYPE_EDGE_RISING>,
                    <GIC_SPI 213 IRQ_TYPE_EDGE_RISING>;
-      interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0", "tgiv0", "tgie0",
+      interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0", "tciv0", "tgie0",
                         "tgif0",
-                        "tgia1", "tgib1", "tgiv1", "tgiu1",
-                        "tgia2", "tgib2", "tgiv2", "tgiu2",
-                        "tgia3", "tgib3", "tgic3", "tgid3", "tgiv3",
-                        "tgia4", "tgib4", "tgic4", "tgid4", "tgiv4",
+                        "tgia1", "tgib1", "tciv1", "tciu1",
+                        "tgia2", "tgib2", "tciv2", "tciu2",
+                        "tgia3", "tgib3", "tgic3", "tgid3", "tciv3",
+                        "tgia4", "tgib4", "tgic4", "tgid4", "tciv4",
                         "tgiu5", "tgiv5", "tgiw5",
-                        "tgia6", "tgib6", "tgic6", "tgid6", "tgiv6",
-                        "tgia7", "tgib7", "tgic7", "tgid7", "tgiv7",
-                        "tgia8", "tgib8", "tgic8", "tgid8", "tgiv8", "tgiu8";
+                        "tgia6", "tgib6", "tgic6", "tgid6", "tciv6",
+                        "tgia7", "tgib7", "tgic7", "tgid7", "tciv7",
+                        "tgia8", "tgib8", "tgic8", "tgid8", "tciv8", "tciu8";
       clocks = <&cpg CPG_MOD R9A07G044_MTU_X_MCK_MTU3>;
       power-domains = <&cpg>;
       resets = <&cpg R9A07G044_MTU_X_PRESET_MTU3>;
-- 
2.25.1

[PATCH 3/6] dt-bindings: timer: renesas,rz-mtu3: Document RZ/G2UL SoC

[Biju Das]

Add MTU3a binding documentation for Renesas RZ/G2UL SoC.

MTU3a block is identical to one found on RZ/G2L, so no driver changes are
required. The fallback compatible string "renesas,rz-mtu3" will be used
on RZ/G2UL.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml b/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml
index 670a2ebaacdb..2269e0bf8818 100644
--- a/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml
+++ b/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml
@@ -109,6 +109,7 @@ properties:
   compatible:
     items:
       - enum:
+          - renesas,r9a07g043-mtu3  # RZ/G2UL
           - renesas,r9a07g044-mtu3  # RZ/G2{L,LC}
           - renesas,r9a07g054-mtu3  # RZ/V2L
       - const: renesas,rz-mtu3
-- 
2.25.1

[PATCH 4/6] arm64: dts: renesas: r9a07g044: Update overfow/underflow IRQ names for MTU3 channels

[Biju Das]

As per R01UH0914EJ0130 Rev.1.30 HW manual the MTU3 overflow/underflow
interrupt names starts with 'tci' instead of 'tgi'.

Replace the below overflow/underflow interrupt names:
 - tgiv0->tciv0
 - tgiv1->tciv1
 - tgiu1->tciu1
 - tgiv2->tciv2
 - tgiu2->tciu2
 - tgiv3->tciv3
 - tgiv4->tciv4
 - tgiv6->tciv6
 - tgiv7->tciv7
 - tgiv8->tciv8
 - tgiu8->tciu8

Fixes: 26336d66d021 ("arm64: dts: renesas: r9a07g044: Add MTU3a node")
Fixes: dd123dd01def ("arm64: dts: renesas: r9a07g054: Add MTU3a node")
Cc: stable@kernel.org
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 16 ++++++++--------
 arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 16 ++++++++--------
 2 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 232910e07444..66f68fc2b241 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -223,20 +223,20 @@ mtu3: timer@10001200 {
 				     <GIC_SPI 212 IRQ_TYPE_EDGE_RISING>,
 				     <GIC_SPI 213 IRQ_TYPE_EDGE_RISING>;
 			interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0",
-					  "tgiv0", "tgie0", "tgif0",
-					  "tgia1", "tgib1", "tgiv1", "tgiu1",
-					  "tgia2", "tgib2", "tgiv2", "tgiu2",
+					  "tciv0", "tgie0", "tgif0",
+					  "tgia1", "tgib1", "tciv1", "tciu1",
+					  "tgia2", "tgib2", "tciv2", "tciu2",
 					  "tgia3", "tgib3", "tgic3", "tgid3",
-					  "tgiv3",
+					  "tciv3",
 					  "tgia4", "tgib4", "tgic4", "tgid4",
-					  "tgiv4",
+					  "tciv4",
 					  "tgiu5", "tgiv5", "tgiw5",
 					  "tgia6", "tgib6", "tgic6", "tgid6",
-					  "tgiv6",
+					  "tciv6",
 					  "tgia7", "tgib7", "tgic7", "tgid7",
-					  "tgiv7",
+					  "tciv7",
 					  "tgia8", "tgib8", "tgic8", "tgid8",
-					  "tgiv8", "tgiu8";
+					  "tciv8", "tciu8";
 			clocks = <&cpg CPG_MOD R9A07G044_MTU_X_MCK_MTU3>;
 			power-domains = <&cpg>;
 			resets = <&cpg R9A07G044_MTU_X_PRESET_MTU3>;
diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
index 2eba3a8a100d..1f1d481dc783 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
@@ -223,20 +223,20 @@ mtu3: timer@10001200 {
 				     <GIC_SPI 212 IRQ_TYPE_EDGE_RISING>,
 				     <GIC_SPI 213 IRQ_TYPE_EDGE_RISING>;
 			interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0",
-					  "tgiv0", "tgie0", "tgif0",
-					  "tgia1", "tgib1", "tgiv1", "tgiu1",
-					  "tgia2", "tgib2", "tgiv2", "tgiu2",
+					  "tciv0", "tgie0", "tgif0",
+					  "tgia1", "tgib1", "tciv1", "tciu1",
+					  "tgia2", "tgib2", "tciv2", "tciu2",
 					  "tgia3", "tgib3", "tgic3", "tgid3",
-					  "tgiv3",
+					  "tciv3",
 					  "tgia4", "tgib4", "tgic4", "tgid4",
-					  "tgiv4",
+					  "tciv4",
 					  "tgiu5", "tgiv5", "tgiw5",
 					  "tgia6", "tgib6", "tgic6", "tgid6",
-					  "tgiv6",
+					  "tciv6",
 					  "tgia7", "tgib7", "tgic7", "tgid7",
-					  "tgiv7",
+					  "tciv7",
 					  "tgia8", "tgib8", "tgic8", "tgid8",
-					  "tgiv8", "tgiu8";
+					  "tciv8", "tciu8";
 			clocks = <&cpg CPG_MOD R9A07G054_MTU_X_MCK_MTU3>;
 			power-domains = <&cpg>;
 			resets = <&cpg R9A07G054_MTU_X_PRESET_MTU3>;
-- 
2.25.1

[PATCH 5/6] arm64: dts: renesas: r9a07g043: Add MTU3a node

[Biju Das]

Add MTU3a node to R9A07G043 (RZ/G2UL) SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 70 ++++++++++++++++++++++
 1 file changed, 70 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
index 27c35a657b15..c4dca72243db 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
@@ -74,6 +74,76 @@ soc: soc {
 		#size-cells = <2>;
 		ranges;
 
+		mtu3: timer@10001200 {
+			compatible = "renesas,r9a07g043-mtu3",
+				     "renesas,rz-mtu3";
+			reg = <0 0x10001200 0 0xb00>;
+			interrupts = <GIC_SPI 170 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 171 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 172 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 173 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 174 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 175 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 176 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 178 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 179 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 180 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 181 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 182 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 183 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 184 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 185 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 186 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 187 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 191 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 192 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 194 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 201 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 202 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 204 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 205 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 206 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 207 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 211 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 212 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 213 IRQ_TYPE_EDGE_RISING>;
+			interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0",
+					  "tciv0", "tgie0", "tgif0",
+					  "tgia1", "tgib1", "tciv1", "tciu1",
+					  "tgia2", "tgib2", "tciv2", "tciu2",
+					  "tgia3", "tgib3", "tgic3", "tgid3",
+					  "tciv3",
+					  "tgia4", "tgib4", "tgic4", "tgid4",
+					  "tciv4",
+					  "tgiu5", "tgiv5", "tgiw5",
+					  "tgia6", "tgib6", "tgic6", "tgid6",
+					  "tciv6",
+					  "tgia7", "tgib7", "tgic7", "tgid7",
+					  "tciv7",
+					  "tgia8", "tgib8", "tgic8", "tgid8",
+					  "tciv8", "tciu8";
+			clocks = <&cpg CPG_MOD R9A07G043_MTU_X_MCK_MTU3>;
+			power-domains = <&cpg>;
+			resets = <&cpg R9A07G043_MTU_X_PRESET_MTU3>;
+			#pwm-cells = <2>;
+			status = "disabled";
+		};
+
 		ssi0: ssi@10049c00 {
 			compatible = "renesas,r9a07g043-ssi",
 				     "renesas,rz-ssi";
-- 
2.25.1

[PATCH 6/6] arm64: dts: renesas: rzg2ul-smarc: Add support for enabling MTU3

[Biju Das]

Add support for PMOD_MTU3 macro to enable MTU3 node on RZ/G2UL SMARC
EVK.

The MTU3a PWM pins on PMOD0 are muxed with SPI1. Disable SPI1, when
PMOD_MTU3 macro is enabled.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts  | 11 +++++++++++
 .../boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi  |  6 ++++++
 arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi       | 13 +++++++++++++
 3 files changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts b/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts
index 01483b4302c2..8e0107df2d46 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts
+++ b/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts
@@ -17,6 +17,17 @@
 #define SW_SW0_DEV_SEL	1
 #define SW_ET0_EN_N	1
 
+/*
+ * To enable MTU3a PWM on PMOD0,
+ *  - Set DIP-Switch SW1-3 to On position.
+ *  - Set PMOD_MTU3 macro to 1.
+ */
+#define PMOD_MTU3	0
+
+#if (PMOD_MTU3 && !SW_ET0_EN_N)
+#error "Cannot set as both PMOD_MTU3 and !SW_ET0_EN_N are mutually exclusive"
+#endif
+
 #include "r9a07g043u.dtsi"
 #include "rzg2ul-smarc-som.dtsi"
 #include "rzg2ul-smarc.dtsi"
diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi
index 58923dc83faa..355694fe4af6 100644
--- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi
@@ -50,6 +50,12 @@ i2c1_pins: i2c1 {
 		input-enable;
 	};
 
+	mtu3_pins: mtu3 {
+		mtu2-pwm {
+			pinmux = <RZG2L_PORT_PINMUX(4, 0, 4)>; /* MTIOC2A */
+		};
+	};
+
 	scif0_pins: scif0 {
 		pinmux = <RZG2L_PORT_PINMUX(6, 4, 6)>, /* TxD */
 			 <RZG2L_PORT_PINMUX(6, 3, 6)>; /* RxD */
diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi
index 2a1331ed1a5c..8eb411aac80d 100644
--- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi
@@ -28,6 +28,19 @@ wm8978: codec@1a {
 	};
 };
 
+#if PMOD_MTU3
+&mtu3 {
+	pinctrl-0 = <&mtu3_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+};
+
+&spi1 {
+	status = "disabled";
+};
+#endif
+
 #if (SW_ET0_EN_N)
 &ssi1 {
 	pinctrl-0 = <&ssi1_pins>;
-- 
2.25.1

Re: [PATCH 3/6] dt-bindings: timer: renesas,rz-mtu3: Document RZ/G2UL SoC

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 1161 bytes --]

On Thu, Jul 20, 2023 at 02:10:13PM +0100, Biju Das wrote:
> Add MTU3a binding documentation for Renesas RZ/G2UL SoC.
> 
> MTU3a block is identical to one found on RZ/G2L, so no driver changes are
> required. The fallback compatible string "renesas,rz-mtu3" will be used
> on RZ/G2UL.
> 
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>

Acked-by: Conor Dooley <conor.dooley@microchip.com>

Thanks,
Conor.

> ---
>  Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml b/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml
> index 670a2ebaacdb..2269e0bf8818 100644
> --- a/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml
> +++ b/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml
> @@ -109,6 +109,7 @@ properties:
>    compatible:
>      items:
>        - enum:
> +          - renesas,r9a07g043-mtu3  # RZ/G2UL
>            - renesas,r9a07g044-mtu3  # RZ/G2{L,LC}
>            - renesas,r9a07g054-mtu3  # RZ/V2L
>        - const: renesas,rz-mtu3
> -- 
> 2.25.1
> 

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Re: [PATCH 2/6] dt-bindings: timer: renesas,rz-mtu3: Fix overflow/underflow interrupt names

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 731 bytes --]

On Thu, Jul 20, 2023 at 02:10:12PM +0100, Biju Das wrote:
> As per R01UH0914EJ0130 Rev.1.30 HW manual the MTU3 overflow/underflow
> interrupt names starts with 'tci' instead of 'tgi'.
> 
> Fix this documentation issue by replacing below overflow/underflow
> interrupt names:
>  - tgiv0->tciv0
>  - tgiv1->tciv1
>  - tgiu1->tciu1
>  - tgiv2->tciv2
>  - tgiu2->tciu2
>  - tgiv3->tciv3
>  - tgiv4->tciv4
>  - tgiv6->tciv6
>  - tgiv7->tciv7
>  - tgiv8->tciv8
>  - tgiu8->tciu8
> 
> Fixes: 0a9d6b54297e ("dt-bindings: timer: Document RZ/G2L MTU3a bindings")
> Cc: stable@kernel.org
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>

I assume this means that nothing is actually using these interrupt
names?

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RE: [PATCH 2/6] dt-bindings: timer: renesas,rz-mtu3: Fix overflow/underflow interrupt names

[Biju Das]

Hi Conor Dooley,

Thanks for the feedback.

> -----Original Message-----
> From: Conor Dooley <conor@kernel.org>
> Sent: Thursday, July 20, 2023 6:19 PM
> To: Biju Das <biju.das.jz@bp.renesas.com>
> Cc: Rob Herring <robh+dt@kernel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; Conor Dooley <conor+dt@kernel.org>;
> Daniel Lezcano <daniel.lezcano@linaro.org>; Thomas Gleixner
> <tglx@linutronix.de>; Geert Uytterhoeven <geert+renesas@glider.be>;
> Magnus Damm <magnus.damm@gmail.com>; Lee Jones <lee@kernel.org>; linux-
> iio@vger.kernel.org; linux-renesas-soc@vger.kernel.org;
> devicetree@vger.kernel.org; Fabrizio Castro
> <fabrizio.castro.jz@renesas.com>; Prabhakar Mahadev Lad
> <prabhakar.mahadev-lad.rj@bp.renesas.com>; stable@kernel.org
> Subject: Re: [PATCH 2/6] dt-bindings: timer: renesas,rz-mtu3: Fix
> overflow/underflow interrupt names
> 
> On Thu, Jul 20, 2023 at 02:10:12PM +0100, Biju Das wrote:
> > As per R01UH0914EJ0130 Rev.1.30 HW manual the MTU3 overflow/underflow
> > interrupt names starts with 'tci' instead of 'tgi'.
> >
> > Fix this documentation issue by replacing below overflow/underflow
> > interrupt names:
> >  - tgiv0->tciv0
> >  - tgiv1->tciv1
> >  - tgiu1->tciu1
> >  - tgiv2->tciv2
> >  - tgiu2->tciu2
> >  - tgiv3->tciv3
> >  - tgiv4->tciv4
> >  - tgiv6->tciv6
> >  - tgiv7->tciv7
> >  - tgiv8->tciv8
> >  - tgiu8->tciu8
> >
> > Fixes: 0a9d6b54297e ("dt-bindings: timer: Document RZ/G2L MTU3a
> > bindings")
> > Cc: stable@kernel.org
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> 
> I assume this means that nothing is actually using these interrupt
> names?

Yes, That is correct. Corresponding driver doesn't have interrupt support.

Cheers,
Biju

Re: [PATCH 2/6] dt-bindings: timer: renesas,rz-mtu3: Fix overflow/underflow interrupt names

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 2001 bytes --]

On Thu, Jul 20, 2023 at 05:52:00PM +0000, Biju Das wrote:
> > -----Original Message-----
> > From: Conor Dooley <conor@kernel.org>

> > Sent: Thursday, July 20, 2023 6:19 PM
> > To: Biju Das <biju.das.jz@bp.renesas.com>
> > Cc: Rob Herring <robh+dt@kernel.org>; Krzysztof Kozlowski
> > <krzysztof.kozlowski+dt@linaro.org>; Conor Dooley <conor+dt@kernel.org>;
> > Daniel Lezcano <daniel.lezcano@linaro.org>; Thomas Gleixner
> > <tglx@linutronix.de>; Geert Uytterhoeven <geert+renesas@glider.be>;
> > Magnus Damm <magnus.damm@gmail.com>; Lee Jones <lee@kernel.org>; linux-
> > iio@vger.kernel.org; linux-renesas-soc@vger.kernel.org;
> > devicetree@vger.kernel.org; Fabrizio Castro
> > <fabrizio.castro.jz@renesas.com>; Prabhakar Mahadev Lad
> > <prabhakar.mahadev-lad.rj@bp.renesas.com>; stable@kernel.org

btw, please trim this stuff :)

> > Subject: Re: [PATCH 2/6] dt-bindings: timer: renesas,rz-mtu3: Fix
> > overflow/underflow interrupt names
> > 
> > On Thu, Jul 20, 2023 at 02:10:12PM +0100, Biju Das wrote:
> > > As per R01UH0914EJ0130 Rev.1.30 HW manual the MTU3 overflow/underflow
> > > interrupt names starts with 'tci' instead of 'tgi'.
> > >
> > > Fix this documentation issue by replacing below overflow/underflow
> > > interrupt names:
> > >  - tgiv0->tciv0
> > >  - tgiv1->tciv1
> > >  - tgiu1->tciu1
> > >  - tgiv2->tciv2
> > >  - tgiu2->tciu2
> > >  - tgiv3->tciv3
> > >  - tgiv4->tciv4
> > >  - tgiv6->tciv6
> > >  - tgiv7->tciv7
> > >  - tgiv8->tciv8
> > >  - tgiu8->tciu8
> > >
> > > Fixes: 0a9d6b54297e ("dt-bindings: timer: Document RZ/G2L MTU3a
> > > bindings")
> > > Cc: stable@kernel.org
> > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > 
> > I assume this means that nothing is actually using these interrupt
> > names?
> 
> Yes, That is correct. Corresponding driver doesn't have interrupt support.

Okay, if it is not being used anywhere:
Acked-by: Conor Dooley <conor.dooley@microchip.com>

Thanks,
Conor.

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Re: [PATCH 5/6] arm64: dts: renesas: r9a07g043: Add MTU3a node

[kernel test robot]

Hi Biju,

kernel test robot noticed the following build errors:

[auto build test ERROR on geert-renesas-devel/next]
[also build test ERROR on robh/for-next linus/master v6.5-rc2 next-20230721]
[cannot apply to tip/timers/core]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Biju-Das/dt-bindings-timer-renesas-rz-mtu3-Improve-documentation/20230720-213033
base:   https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next
patch link:    https://lore.kernel.org/r/20230720131016.331793-6-biju.das.jz%40bp.renesas.com
patch subject: [PATCH 5/6] arm64: dts: renesas: r9a07g043: Add MTU3a node
config: riscv-allmodconfig (https://download.01.org/0day-ci/archive/20230722/202307221318.jz5pDcvU-lkp@intel.com/config)
compiler: riscv64-linux-gcc (GCC) 12.3.0
reproduce: (https://download.01.org/0day-ci/archive/20230722/202307221318.jz5pDcvU-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202307221318.jz5pDcvU-lkp@intel.com/

All errors (new ones prefixed by >>):

>> Error: scripts/dtc/include-prefixes/arm64/renesas/r9a07g043.dtsi:81.18-19 syntax error
   FATAL ERROR: Unable to parse input tree

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

RE: [PATCH 5/6] arm64: dts: renesas: r9a07g043: Add MTU3a node

[Biju Das]

Hi Kernel test robot,

Thaks for the feedback.

> -----Original Message-----
> From: kernel test robot <lkp@intel.com>
> Sent: Saturday, July 22, 2023 6:16 AM
> To: Biju Das <biju.das.jz@bp.renesas.com>; Rob Herring
> <robh+dt@kernel.org>; Krzysztof Kozlowski <krzk@kernel.org>; Conor
> Dooley <conor+dt@kernel.org>
> Cc: oe-kbuild-all@lists.linux.dev; Biju Das
> <biju.das.jz@bp.renesas.com>; Geert Uytterhoeven
> <geert+renesas@glider.be>; Magnus Damm <magnus.damm@gmail.com>; linux-
> renesas-soc@vger.kernel.org; devicetree@vger.kernel.org; Fabrizio Castro
> <fabrizio.castro.jz@renesas.com>; Prabhakar Mahadev Lad
> <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Subject: Re: [PATCH 5/6] arm64: dts: renesas: r9a07g043: Add MTU3a node
> 
> Hi Biju,
> 
> kernel test robot noticed the following build errors:
> 
> [auto build test ERROR on geert-renesas-devel/next] [also build test
> ERROR on robh/for-next linus/master v6.5-rc2 next-20230721] [cannot
> apply to tip/timers/core] [If your patch is applied to the wrong git
> tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in

Opps, Need to use <SOC_PERIPHERAL_IRQ> for interrupts
as there is difference between arm64 and risc-v.

Will send v2 after testing on both arm64 and risc-v.

Cheers,
Biju

 
> If you fix the issue in a separate patch/commit (i.e. not just a new
> version of the same patch/commit), kindly add following tags
> | Reported-by: kernel test robot <lkp@intel.com>
> | Closes:
> 
> All errors (new ones prefixed by >>):
> 
> >> Error:
> >> scripts/dtc/include-prefixes/arm64/renesas/r9a07g043.dtsi:81.18-19
> >> syntax error
>    FATAL ERROR: Unable to parse input tree
> 
> --
> 0-DAY CI Kernel Test Service
> https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub
> .com%2Fintel%2Flkp-
> tests%2Fwiki&data=05%7C01%7Cbiju.das.jz%40bp.renesas.com%7C0d92a2b8f7784
> 0058e3708db8a72d705%7C53d82571da1947e49cb4625a166a4a2a%7C0%7C0%7C6382559
> 98068843802%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIi
> LCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=IddHS16rE6UW3JnsY1s
> mg6bJ%2BMFLDHIjIsA%2FWjaPO8w%3D&reserved=0

RE: [PATCH 2/6] dt-bindings: timer: renesas,rz-mtu3: Fix overflow/underflow interrupt names

[Biju Das]

Hi Conor Dooley, 

> Subject: Re: [PATCH 2/6] dt-bindings: timer: renesas,rz-mtu3: Fix
> overflow/underflow interrupt names
> 
> On Thu, Jul 20, 2023 at 05:52:00PM +0000, Biju Das wrote:
> > > -----Original Message-----
> > > From: Conor Dooley <conor@kernel.org>
> 
> > > Sent: Thursday, July 20, 2023 6:19 PM
> > > To: Biju Das <biju.das.jz@bp.renesas.com>
> > > Cc: Rob Herring <robh+dt@kernel.org>; Krzysztof Kozlowski
> > > <krzysztof.kozlowski+dt@linaro.org>; Conor Dooley
> > > <conor+dt@kernel.org>; Daniel Lezcano <daniel.lezcano@linaro.org>;
> > > Thomas Gleixner <tglx@linutronix.de>; Geert Uytterhoeven
> > > <geert+renesas@glider.be>; Magnus Damm <magnus.damm@gmail.com>; Lee
> > > Jones <lee@kernel.org>; linux- iio@vger.kernel.org;
> > > linux-renesas-soc@vger.kernel.org;
> > > devicetree@vger.kernel.org; Fabrizio Castro
> > > <fabrizio.castro.jz@renesas.com>; Prabhakar Mahadev Lad
> > > <prabhakar.mahadev-lad.rj@bp.renesas.com>; stable@kernel.org
> 
> btw, please trim this stuff :)

You mean trim the recipient list?

Cheers,
Biju

> 
> > > Subject: Re: [PATCH 2/6] dt-bindings: timer: renesas,rz-mtu3: Fix
> > > overflow/underflow interrupt names
> > >
> > > On Thu, Jul 20, 2023 at 02:10:12PM +0100, Biju Das wrote:
> > > > As per R01UH0914EJ0130 Rev.1.30 HW manual the MTU3
> > > > overflow/underflow interrupt names starts with 'tci' instead of
> 'tgi'.
> > > >
> > > > Fix this documentation issue by replacing below overflow/underflow
> > > > interrupt names:
> > > >  - tgiv0->tciv0
> > > >  - tgiv1->tciv1
> > > >  - tgiu1->tciu1
> > > >  - tgiv2->tciv2
> > > >  - tgiu2->tciu2
> > > >  - tgiv3->tciv3
> > > >  - tgiv4->tciv4
> > > >  - tgiv6->tciv6
> > > >  - tgiv7->tciv7
> > > >  - tgiv8->tciv8
> > > >  - tgiu8->tciu8
> > > >
> > > > Fixes: 0a9d6b54297e ("dt-bindings: timer: Document RZ/G2L MTU3a
> > > > bindings")
> > > > Cc: stable@kernel.org
> > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > >
> > > I assume this means that nothing is actually using these interrupt
> > > names?
> >
> > Yes, That is correct. Corresponding driver doesn't have interrupt
> support.
> 
> Okay, if it is not being used anywhere:
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> 
> Thanks,
> Conor.

Re: [PATCH 2/6] dt-bindings: timer: renesas,rz-mtu3: Fix overflow/underflow interrupt names

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 1247 bytes --]

On Mon, Jul 24, 2023 at 08:04:08AM +0000, Biju Das wrote:
> Hi Conor Dooley, 
> 
> > Subject: Re: [PATCH 2/6] dt-bindings: timer: renesas,rz-mtu3: Fix
> > overflow/underflow interrupt names
> > 
> > On Thu, Jul 20, 2023 at 05:52:00PM +0000, Biju Das wrote:
> > > > -----Original Message-----
> > > > From: Conor Dooley <conor@kernel.org>
> > 
> > > > Sent: Thursday, July 20, 2023 6:19 PM
> > > > To: Biju Das <biju.das.jz@bp.renesas.com>
> > > > Cc: Rob Herring <robh+dt@kernel.org>; Krzysztof Kozlowski
> > > > <krzysztof.kozlowski+dt@linaro.org>; Conor Dooley
> > > > <conor+dt@kernel.org>; Daniel Lezcano <daniel.lezcano@linaro.org>;
> > > > Thomas Gleixner <tglx@linutronix.de>; Geert Uytterhoeven
> > > > <geert+renesas@glider.be>; Magnus Damm <magnus.damm@gmail.com>; Lee
> > > > Jones <lee@kernel.org>; linux- iio@vger.kernel.org;
> > > > linux-renesas-soc@vger.kernel.org;
> > > > devicetree@vger.kernel.org; Fabrizio Castro
> > > > <fabrizio.castro.jz@renesas.com>; Prabhakar Mahadev Lad
> > > > <prabhakar.mahadev-lad.rj@bp.renesas.com>; stable@kernel.org
> > 
> > btw, please trim this stuff :)
> 
> You mean trim the recipient list?

Not the actual recipient list, this junk that outlook adds to emails :)

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RE: [PATCH 2/6] dt-bindings: timer: renesas,rz-mtu3: Fix overflow/underflow interrupt names

[Biju Das]

Hi Conor Dooley,

> On Mon, Jul 24, 2023 at 08:04:08AM +0000, Biju Das wrote:
> > Hi Conor Dooley,
> >
> > > Subject: Re: [PATCH 2/6] dt-bindings: timer: renesas,rz-mtu3: Fix
> > > overflow/underflow interrupt names
> > >
> > > On Thu, Jul 20, 2023 at 05:52:00PM +0000, Biju Das wrote:
> > > > > -----Original Message-----
> > > > > From: Conor Dooley <conor@kernel.org>
> > >
> > >
> > > btw, please trim this stuff :)
> >
> > You mean trim the recipient list?
> 
> Not the actual recipient list, this junk that outlook adds to emails :)

Ah OK got it, like above.

Cheers,
Biju