[PATCH 0/2] clk: qcom: gcc-msm8917: Enable GPLL0_SLEEP_CLK_SRC

[PATCH 0/2] clk: qcom: gcc-msm8917: Enable GPLL0_SLEEP_CLK_SRC

[Otto Pflüger]

I left this clock disabled for some reason and this made GPLL0_EARLY
report a zero rate because it has this clock set as the parent clock.

This is fixed in this series by adding the clock to qcom,gcc-msm8917.h
and the clock list. The clock definition is also changed to use the
correct enable/disable operations for this type of clock.

Otto Pflüger (2):
  dt-bindings: clock: gcc-msm8917: Add definition for
    GPLL0_SLEEP_CLK_SRC
  clk: qcom: gcc-msm8917: Enable GPLL0_SLEEP_CLK_SRC

 drivers/clk/qcom/gcc-msm8917.c               | 3 ++-
 include/dt-bindings/clock/qcom,gcc-msm8917.h | 1 +
 2 files changed, 3 insertions(+), 1 deletion(-)


base-commit: 626c67169f9972fffcdf3bc3864de421f162ebf5
-- 
2.39.1

[PATCH 1/2] dt-bindings: clock: gcc-msm8917: Add definition for GPLL0_SLEEP_CLK_SRC

[Otto Pflüger]

Add the missing #define for GPLL0_SLEEP_CLK_SRC, the parent clock of
GPLL0_EARLY.

Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de>
---
 include/dt-bindings/clock/qcom,gcc-msm8917.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/dt-bindings/clock/qcom,gcc-msm8917.h b/include/dt-bindings/clock/qcom,gcc-msm8917.h
index a371b1adc896..4b421e7414b5 100644
--- a/include/dt-bindings/clock/qcom,gcc-msm8917.h
+++ b/include/dt-bindings/clock/qcom,gcc-msm8917.h
@@ -169,6 +169,7 @@
 #define VFE0_CLK_SRC				162
 #define VFE1_CLK_SRC				163
 #define VSYNC_CLK_SRC				164
+#define GPLL0_SLEEP_CLK_SRC			165
 
 /* GCC block resets */
 #define GCC_CAMSS_MICRO_BCR			0
-- 
2.39.1

Re: [PATCH 1/2] dt-bindings: clock: gcc-msm8917: Add definition for GPLL0_SLEEP_CLK_SRC

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 286 bytes --]

On Wed, Aug 02, 2023 at 07:03:16PM +0200, Otto Pflüger wrote:
> Add the missing #define for GPLL0_SLEEP_CLK_SRC, the parent clock of
> GPLL0_EARLY.
> 
> Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de>

Acked-by: Conor Dooley <conor.dooley@microchip.com>

Thanks,
Conor.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

[PATCH 2/2] clk: qcom: gcc-msm8917: Enable GPLL0_SLEEP_CLK_SRC

[Otto Pflüger]

This is the parent clock of gpll0_early, so it needs to be enabled
for gpll0_early to return the correct rate. Enable GPLL0_SLEEP_CLK_SRC
by adding its existing definition to the clock list.

This clock also doesn't work with clk_alpha_pll_ops, use
clk_branch_simple_ops instead to make it enable and disable correctly.

Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de>
---
 drivers/clk/qcom/gcc-msm8917.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/qcom/gcc-msm8917.c b/drivers/clk/qcom/gcc-msm8917.c
index 5ec14480e068..f2dd132e2fb1 100644
--- a/drivers/clk/qcom/gcc-msm8917.c
+++ b/drivers/clk/qcom/gcc-msm8917.c
@@ -63,7 +63,7 @@ static struct clk_alpha_pll gpll0_sleep_clk_src = {
 				.index = DT_XO,
 			},
 			.num_parents = 1,
-			.ops = &clk_alpha_pll_ops,
+			.ops = &clk_branch_simple_ops,
 		},
 	},
 };
@@ -3041,6 +3041,7 @@ static struct gdsc cpp_gdsc = {
 static struct clk_regmap *gcc_msm8917_clocks[] = {
 	[GPLL0] = &gpll0.clkr,
 	[GPLL0_EARLY] = &gpll0_early.clkr,
+	[GPLL0_SLEEP_CLK_SRC] = &gpll0_sleep_clk_src.clkr,
 	[GPLL3] = &gpll3.clkr,
 	[GPLL3_EARLY] = &gpll3_early.clkr,
 	[GPLL4] = &gpll4.clkr,
-- 
2.39.1

Re: [PATCH 0/2] clk: qcom: gcc-msm8917: Enable GPLL0_SLEEP_CLK_SRC

[Bjorn Andersson]

On Wed, 02 Aug 2023 19:03:15 +0200, Otto Pflüger wrote:
> I left this clock disabled for some reason and this made GPLL0_EARLY
> report a zero rate because it has this clock set as the parent clock.
> 
> This is fixed in this series by adding the clock to qcom,gcc-msm8917.h
> and the clock list. The clock definition is also changed to use the
> correct enable/disable operations for this type of clock.
> 
> [...]

Applied, thanks!

[1/2] dt-bindings: clock: gcc-msm8917: Add definition for GPLL0_SLEEP_CLK_SRC
      commit: 593576a369ec885275a1a368a6838844b78b4f35
[2/2] clk: qcom: gcc-msm8917: Enable GPLL0_SLEEP_CLK_SRC
      commit: d863492886930a1a6f7c0d9dda8f728077b540f0

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>