[PATCH v2 0/2] riscv: dts: starfive - Add crypto and trng node

[PATCH v2 0/2] riscv: dts: starfive - Add crypto and trng node

[Jia Jie Ho]

The following patches add hardware cryptographic and trng module nodes
to JH7110 dts. Patches have been tested on VisionFive2 board.

v2 - Fixed dtbs_check errors on dma node in patch 1. (Conor)

Jia Jie Ho (2):
  riscv: dts: starfive - Add crypto and DMA node for JH7110
  riscv: dts: starfive - Add hwrng node for JH7110 SoC

 arch/riscv/boot/dts/starfive/jh7110.dtsi | 37 ++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

-- 
2.34.1

[PATCH v2 1/2] riscv: dts: starfive - Add crypto and DMA node for JH7110

[Jia Jie Ho]

Add hardware crypto module and dedicated dma controller node to StarFive
JH7110 SoC.

Co-developed-by: Huan Feng <huan.feng@starfivetech.com>
Signed-off-by: Huan Feng <huan.feng@starfivetech.com>
Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
---
 arch/riscv/boot/dts/starfive/jh7110.dtsi | 27 ++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index a608433200e8..76046ca533ce 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -821,6 +821,33 @@ watchdog@13070000 {
 				 <&syscrg JH7110_SYSRST_WDT_CORE>;
 		};
 
+		crypto: crypto@16000000 {
+			compatible = "starfive,jh7110-crypto";
+			reg = <0x0 0x16000000 0x0 0x4000>;
+			clocks = <&stgcrg JH7110_STGCLK_SEC_AHB>,
+				 <&stgcrg JH7110_STGCLK_SEC_MISC_AHB>;
+			clock-names = "hclk", "ahb";
+			interrupts = <28>;
+			resets = <&stgcrg JH7110_STGRST_SEC_AHB>;
+			dmas = <&sdma 1 2>, <&sdma 0 2>;
+			dma-names = "tx", "rx";
+		};
+
+		sdma: dma-controller@16008000 {
+			compatible = "arm,pl080", "arm,primecell";
+			arm,primecell-periphid = <0x00041080>;
+			reg = <0x0 0x16008000 0x0 0x4000>;
+			interrupts = <29>;
+			clocks = <&stgcrg JH7110_STGCLK_SEC_AHB>;
+			clock-names = "apb_pclk";
+			resets = <&stgcrg JH7110_STGRST_SEC_AHB>;
+			lli-bus-interface-ahb1;
+			mem-bus-interface-ahb1;
+			memcpy-burst-size = <256>;
+			memcpy-bus-width = <32>;
+			#dma-cells = <2>;
+		};
+
 		gmac0: ethernet@16030000 {
 			compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
 			reg = <0x0 0x16030000 0x0 0x10000>;
-- 
2.34.1

[PATCH v2 2/2] riscv: dts: starfive - Add hwrng node for JH7110 SoC

[Jia Jie Ho]

Add hardware rng controller node for StarFive JH7110 SoC.

Co-developed-by: Jenny Zhang <jenny.zhang@starfivetech.com>
Signed-off-by: Jenny Zhang <jenny.zhang@starfivetech.com>
Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
---
 arch/riscv/boot/dts/starfive/jh7110.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 76046ca533ce..70d107bdcc10 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -848,6 +848,16 @@ sdma: dma-controller@16008000 {
 			#dma-cells = <2>;
 		};
 
+		rng: rng@1600c000 {
+			compatible = "starfive,jh7110-trng";
+			reg = <0x0 0x1600C000 0x0 0x4000>;
+			clocks = <&stgcrg JH7110_STGCLK_SEC_AHB>,
+				 <&stgcrg JH7110_STGCLK_SEC_MISC_AHB>;
+			clock-names = "hclk", "ahb";
+			resets = <&stgcrg JH7110_STGRST_SEC_AHB>;
+			interrupts = <30>;
+		};
+
 		gmac0: ethernet@16030000 {
 			compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
 			reg = <0x0 0x16030000 0x0 0x10000>;
-- 
2.34.1

Re: [PATCH v2 0/2] riscv: dts: starfive - Add crypto and trng node

[Conor Dooley]

From: Conor Dooley <conor.dooley@microchip.com>

On Tue, 08 Aug 2023 22:15:56 +0800, Jia Jie Ho wrote:
> The following patches add hardware cryptographic and trng module nodes
> to JH7110 dts. Patches have been tested on VisionFive2 board.
> 
> v2 - Fixed dtbs_check errors on dma node in patch 1. (Conor)
> 
> Jia Jie Ho (2):
>   riscv: dts: starfive - Add crypto and DMA node for JH7110
>   riscv: dts: starfive - Add hwrng node for JH7110 SoC
> 
> [...]

Applied to riscv-dt-for-next, thanks!

[1/2] riscv: dts: starfive - Add crypto and DMA node for JH7110
      https://git.kernel.org/conor/c/e2c07765e179
[2/2] riscv: dts: starfive - Add hwrng node for JH7110 SoC
      https://git.kernel.org/conor/c/87ddf5b10964

Thanks,
Conor.