From: Conor Dooley <conor@kernel.org>
To: Mukesh Ojha <quic_mojha@quicinc.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] dt-bindings: cache: qcom,llcc: correct QDU1000 reg entries
Date: Wed, 8 Nov 2023 12:26:13 +0000 [thread overview]
Message-ID: <20231108-hurricane-carefully-d9d3c1348f8c@spud> (raw)
In-Reply-To: <0f76a5c1-14ce-cbfa-bbd9-b2826c4bbbdb@quicinc.com>
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On Tue, Nov 07, 2023 at 02:25:25PM +0530, Mukesh Ojha wrote:
>
>
> On 11/7/2023 1:34 PM, Krzysztof Kozlowski wrote:
> > Qualcomm QDU1000 DTSI comes with one LLCC0 base address as pointed by
> > dtbs_check:
> >
> > qdu1000-idp.dtb: system-cache-controller@19200000: reg-names:2: 'llcc2_base' was expected
> >
> > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> >
> > ---
> >
> > Recent LLCC patches were not tested on QDU1000 thus the LLCC is there
> > broken. This patch at least tries to bring some sense according to
> > DTSI, but I have no clue what is here correct: driver, DTS or bindings.
> > ---
> > Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
> > index 580f9a97ddf7..d610b0be262c 100644
> > --- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
> > +++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
> > @@ -64,6 +64,7 @@ allOf:
> > compatible:
> > contains:
> > enum:
> > + - qcom,qdu1000-llcc
> > - qcom,sc7180-llcc
> > - qcom,sm6350-llcc
>
> Thanks, again.
>
> Acked-by: Mukesh Ojha <quic_mojha@quicinc.com>
I'm assuming given your employer, this ack means that there is no
llcc2_base on the qdu1000.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Cheers,
Conor.
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next prev parent reply other threads:[~2023-11-08 12:26 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-07 8:04 [PATCH] dt-bindings: cache: qcom,llcc: correct QDU1000 reg entries Krzysztof Kozlowski
2023-11-07 8:55 ` Mukesh Ojha
2023-11-08 12:26 ` Conor Dooley [this message]
2023-11-09 8:40 ` Mukesh Ojha
2024-06-11 10:15 ` Mukesh Ojha
2023-12-08 13:23 ` Rob Herring
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