From: Conor Dooley <conor@kernel.org>
To: JeeHeng Sia <jeeheng.sia@starfivetech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
"kernel@esmil.dk" <kernel@esmil.dk>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"krzysztof.kozlowski+dt@linaro.org"
<krzysztof.kozlowski+dt@linaro.org>,
"krzk@kernel.org" <krzk@kernel.org>,
"conor+dt@kernel.org" <conor+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
"aou@eecs.berkeley.edu" <aou@eecs.berkeley.edu>,
"daniel.lezcano@linaro.org" <daniel.lezcano@linaro.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"anup@brainfault.org" <anup@brainfault.org>,
Greg KH <gregkh@linuxfoundation.org>,
"jirislaby@kernel.org" <jirislaby@kernel.org>,
"michal.simek@amd.com" <michal.simek@amd.com>,
Michael Zhu <michael.zhu@starfivetech.com>,
"drew@beagleboard.org" <drew@beagleboard.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Leyfoon Tan <leyfoon.tan@starfivetech.com>,
Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH v3 2/6] dt-bindings: riscv: Add StarFive JH8100 SoC
Date: Sat, 16 Dec 2023 12:06:35 +0000 [thread overview]
Message-ID: <20231216-unknown-shakiness-8c4a5cd53006@spud> (raw)
In-Reply-To: <ab8bb47cbcca40649ff1e115ed34d3c1@EXMBX066.cuchost.com>
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On Fri, Dec 15, 2023 at 01:49:02AM +0000, JeeHeng Sia wrote:
> Thank you everyone. I think I get your point. Is it possible to send "RFC"
> patches for things like DT, clk&reset, and pinctrl? Please note that
> these have been tested on FPGA/Emulator.
For sure you can send them as RFC, yes.
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next prev parent reply other threads:[~2023-12-16 12:06 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-01 12:14 [PATCH v3 0/6] Initial device tree support for StarFive JH8100 SoC Sia Jee Heng
2023-12-01 12:14 ` [PATCH v3 1/6] dt-bindings: riscv: Add StarFive Dubhe compatibles Sia Jee Heng
2023-12-01 12:14 ` [PATCH v3 2/6] dt-bindings: riscv: Add StarFive JH8100 SoC Sia Jee Heng
2023-12-13 12:43 ` Conor Dooley
2023-12-13 13:24 ` Leyfoon Tan
2023-12-14 0:36 ` JeeHeng Sia
2023-12-14 16:22 ` Conor Dooley
2023-12-14 17:20 ` Palmer Dabbelt
2023-12-15 1:49 ` JeeHeng Sia
2023-12-16 12:06 ` Conor Dooley [this message]
2023-12-01 12:14 ` [PATCH v3 3/6] dt-bindings: timer: Add StarFive JH8100 clint Sia Jee Heng
2023-12-04 17:36 ` Daniel Lezcano
2023-12-01 12:14 ` [PATCH v3 4/6] dt-bindings: interrupt-controller: Add StarFive JH8100 plic Sia Jee Heng
2023-12-01 12:14 ` [PATCH v3 5/6] dt-bindings: serial: cdns: Add new compatible string for StarFive JH8100 UART Sia Jee Heng
2023-12-01 15:46 ` Conor Dooley
2023-12-01 12:14 ` [PATCH v3 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree Sia Jee Heng
2023-12-08 12:08 ` Shengyu Qu
2023-12-11 1:38 ` JeeHeng Sia
2023-12-11 7:58 ` Conor Dooley
2023-12-11 9:38 ` JeeHeng Sia
2023-12-11 17:43 ` Conor Dooley
2023-12-08 16:05 ` Emil Renner Berthing
2023-12-13 12:39 ` Emil Renner Berthing
2023-12-14 0:34 ` JeeHeng Sia
2023-12-06 16:45 ` [PATCH v3 0/6] Initial device tree support for StarFive JH8100 SoC Conor Dooley
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