From: Conor Dooley <conor@kernel.org>
To: Biju Das <biju.das.jz@bp.renesas.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
linux-media@vger.kernel.org, devicetree@vger.kernel.org,
linux-renesas-soc@vger.kernel.org,
Biju Das <biju.das.au@gmail.com>
Subject: Re: [PATCH 2/5] media: dt-bindings: renesas,rzg2l-cru: Document Renesas RZ/G2UL CRU block
Date: Wed, 24 Jan 2024 17:48:21 +0000 [thread overview]
Message-ID: <20240124-staging-handgrip-a95b44189566@spud> (raw)
In-Reply-To: <20240123121720.294753-3-biju.das.jz@bp.renesas.com>
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On Tue, Jan 23, 2024 at 12:17:17PM +0000, Biju Das wrote:
> Document the CRU IP found in Renesas RZ/G2UL SoC.
>
> The CRU block on the RZ/G2UL SoC is identical to one found on the
> RZ/G2L SoC, but it does not support parallel input.
>
> No driver changes are required as generic compatible string
> "renesas,rzg2l-cru" will be used as a fallback on RZ/G2UL SoC.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> .../bindings/media/renesas,rzg2l-cru.yaml | 43 +++++++++++++++++--
> 1 file changed, 39 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml b/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml
> index 1e72b8808d24..7015a01fc1bc 100644
> --- a/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml
> +++ b/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml
> @@ -19,6 +19,7 @@ properties:
> compatible:
> items:
> - enum:
> + - renesas,r9a07g043-cru # RZ/G2UL
> - renesas,r9a07g044-cru # RZ/G2{L,LC}
> - renesas,r9a07g054-cru # RZ/V2L
> - const: renesas,rzg2l-cru
> @@ -87,10 +88,6 @@ properties:
> Input port node, describing the Image Processing module connected to the
> CSI-2 receiver.
>
> - required:
> - - port@0
> - - port@1
> -
> required:
> - compatible
> - reg
> @@ -102,6 +99,44 @@ required:
> - reset-names
> - power-domains
>
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - renesas,r9a07g044-cru
> + - renesas,r9a07g054-cru
> + then:
> + properties:
> + ports:
> + properties:
> + port@0:
> + description: Parallel input
> + port@1:
> + description: CSI
> +
> + required:
> + - port@0
> + - port@1
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - renesas,r9a07g043-cru
> + then:
> + properties:
> + ports:
> + properties:
> + port@0: false
> + port@1:
> + description: CSI-2
The description in the existing binding says that port @ 1 is CSI-2
already - but this patch seems to imply that it is only CSI-2 for the 43
model. I don't know the media stuff all that well, but is the port
actually CSI-2 on all 3 devices?
If so, I would drop the description stuff from here and just use the
if/else stuff to restrict the ports, rather than try to re-describe
them.
Cheers,
Conor.
> +
> + required:
> + - port@1
> +
> additionalProperties: false
>
> examples:
> --
> 2.25.1
>
>
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next prev parent reply other threads:[~2024-01-24 17:48 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-23 12:17 [PATCH 0/5] Add RZ/G2UL CRU and CSI support Biju Das
2024-01-23 12:17 ` [PATCH 1/5] media: dt-bindings: renesas,rzg2l-csi2: Document Renesas RZ/G2UL CSI-2 block Biju Das
2024-01-24 17:49 ` Conor Dooley
2024-01-25 14:17 ` Biju Das
2024-01-23 12:17 ` [PATCH 2/5] media: dt-bindings: renesas,rzg2l-cru: Document Renesas RZ/G2UL CRU block Biju Das
2024-01-24 17:48 ` Conor Dooley [this message]
2024-01-25 14:34 ` Biju Das
2024-01-23 12:17 ` [PATCH 3/5] arm64: dts: renesas: r9a07g043u: Add CSI and CRU nodes Biju Das
2024-01-23 12:17 ` [PATCH 4/5] arm64: dts: renesas: rzg2ul-smarc: Enable CRU, CSI support Biju Das
2024-01-23 12:17 ` [PATCH 5/5] arm64: dts: renesas: r9a07g043u11-smarc-cru-csi-ov5645: Reduce I2C frequency Biju Das
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