* [PATCH 2/2] MAINTAINERS: add cache binding directory to cache driver entry
2024-06-26 15:54 [PATCH 1/2] MAINTAINERS: add microchip soc binding directory to microchip soc driver entry Conor Dooley
@ 2024-06-26 15:54 ` Conor Dooley
2024-06-27 7:38 ` Krzysztof Kozlowski
2024-06-26 16:10 ` [PATCH 1/2] MAINTAINERS: add microchip soc binding directory to microchip soc " Conor Dooley
` (3 subsequent siblings)
4 siblings, 1 reply; 7+ messages in thread
From: Conor Dooley @ 2024-06-26 15:54 UTC (permalink / raw)
To: devicetree
Cc: conor, Conor Dooley, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Nicolas Ferre, Alexandre Belloni, Claudiu Beznea,
Lars Povlsen, Steen Hegelund, Daniel Machon
From: Conor Dooley <conor.dooley@microchip.com>
The directory covering cache controller bindings has no MAINTAINER other
than the fallback to myself, Rob and Krzysztof. Add it to the entry for
the corresponding drivers.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index c74fd2b70532..19d67bb04d0b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -21503,6 +21503,7 @@ M: Conor Dooley <conor@kernel.org>
L: linux-riscv@lists.infradead.org
S: Maintained
T: git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
+F: Documentation/devicetree/bindings/cache/
F: drivers/cache
STARFIRE/DURALAN NETWORK DRIVER
--
2.43.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH 2/2] MAINTAINERS: add cache binding directory to cache driver entry
2024-06-26 15:54 ` [PATCH 2/2] MAINTAINERS: add cache binding directory to cache " Conor Dooley
@ 2024-06-27 7:38 ` Krzysztof Kozlowski
0 siblings, 0 replies; 7+ messages in thread
From: Krzysztof Kozlowski @ 2024-06-27 7:38 UTC (permalink / raw)
To: Conor Dooley, devicetree
Cc: Conor Dooley, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Nicolas Ferre, Alexandre Belloni, Claudiu Beznea, Lars Povlsen,
Steen Hegelund, Daniel Machon
On 26/06/2024 17:54, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> The directory covering cache controller bindings has no MAINTAINER other
> than the fallback to myself, Rob and Krzysztof. Add it to the entry for
> the corresponding drivers.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] MAINTAINERS: add microchip soc binding directory to microchip soc driver entry
2024-06-26 15:54 [PATCH 1/2] MAINTAINERS: add microchip soc binding directory to microchip soc driver entry Conor Dooley
2024-06-26 15:54 ` [PATCH 2/2] MAINTAINERS: add cache binding directory to cache " Conor Dooley
@ 2024-06-26 16:10 ` Conor Dooley
2024-06-27 7:35 ` Nicolas Ferre
` (2 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Conor Dooley @ 2024-06-26 16:10 UTC (permalink / raw)
To: devicetree
Cc: Conor Dooley, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Nicolas Ferre, Alexandre Belloni, Claudiu Beznea, Lars Povlsen,
Steen Hegelund, Daniel Machon
[-- Attachment #1: Type: text/plain, Size: 1660 bytes --]
On Wed, Jun 26, 2024 at 04:54:16PM +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> I noticed that there's technically not an explicit maintainer for this
> directory, even if the files currently in it are covered by either the
> Mircochip FPGA or AT91 entries. Add it to the entry covering the
> corresponding driver directory.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> CC: Rob Herring <robh@kernel.org>
> CC: Krzysztof Kozlowski <krzk+dt@kernel.org>
> CC: Conor Dooley <conor+dt@kernel.org>
> CC: devicetree@vger.kernel.org
> CC: Nicolas Ferre <nicolas.ferre@microchip.com>
> CC: Alexandre Belloni <alexandre.belloni@bootlin.com>
> CC: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> CC: Lars Povlsen <lars.povlsen@microchip.com>
> CC: Steen Hegelund <Steen.Hegelund@microchip.com>
> CC: Daniel Machon <daniel.machon@microchip.com>
Huh, I somehow didn't save my updated commit message. The long list of
microchip people here is because it was a move of a sparx5 binding to
this directly that caused me to notice the lack of explicit coverage of
the directory.
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index e2d8fdda1737..c74fd2b70532 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -14975,6 +14975,7 @@ MICROCHIP SOC DRIVERS
> M: Conor Dooley <conor@kernel.org>
> S: Supported
> T: git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
> +F: Documentation/devicetree/bindings/soc/microchip/
> F: drivers/soc/microchip/
>
> MICROCHIP SPI DRIVER
> --
> 2.43.0
>
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^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 1/2] MAINTAINERS: add microchip soc binding directory to microchip soc driver entry
2024-06-26 15:54 [PATCH 1/2] MAINTAINERS: add microchip soc binding directory to microchip soc driver entry Conor Dooley
2024-06-26 15:54 ` [PATCH 2/2] MAINTAINERS: add cache binding directory to cache " Conor Dooley
2024-06-26 16:10 ` [PATCH 1/2] MAINTAINERS: add microchip soc binding directory to microchip soc " Conor Dooley
@ 2024-06-27 7:35 ` Nicolas Ferre
2024-06-27 7:38 ` Krzysztof Kozlowski
2024-06-27 16:28 ` Conor Dooley
4 siblings, 0 replies; 7+ messages in thread
From: Nicolas Ferre @ 2024-06-27 7:35 UTC (permalink / raw)
To: Conor Dooley, devicetree
Cc: Conor Dooley, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Alexandre Belloni, Claudiu Beznea, Lars Povlsen, Steen Hegelund,
Daniel Machon
On 26/06/2024 at 17:54, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> I noticed that there's technically not an explicit maintainer for this
> directory, even if the files currently in it are covered by either the
> Mircochip FPGA or AT91 entries. Add it to the entry covering the
> corresponding driver directory.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> CC: Rob Herring <robh@kernel.org>
> CC: Krzysztof Kozlowski <krzk+dt@kernel.org>
> CC: Conor Dooley <conor+dt@kernel.org>
> CC: devicetree@vger.kernel.org
> CC: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Thanks Conor, best regards,
Nicolas
> CC: Alexandre Belloni <alexandre.belloni@bootlin.com>
> CC: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> CC: Lars Povlsen <lars.povlsen@microchip.com>
> CC: Steen Hegelund <Steen.Hegelund@microchip.com>
> CC: Daniel Machon <daniel.machon@microchip.com>
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index e2d8fdda1737..c74fd2b70532 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -14975,6 +14975,7 @@ MICROCHIP SOC DRIVERS
> M: Conor Dooley <conor@kernel.org>
> S: Supported
> T: git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
> +F: Documentation/devicetree/bindings/soc/microchip/
> F: drivers/soc/microchip/
>
> MICROCHIP SPI DRIVER
> --
> 2.43.0
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] MAINTAINERS: add microchip soc binding directory to microchip soc driver entry
2024-06-26 15:54 [PATCH 1/2] MAINTAINERS: add microchip soc binding directory to microchip soc driver entry Conor Dooley
` (2 preceding siblings ...)
2024-06-27 7:35 ` Nicolas Ferre
@ 2024-06-27 7:38 ` Krzysztof Kozlowski
2024-06-27 16:28 ` Conor Dooley
4 siblings, 0 replies; 7+ messages in thread
From: Krzysztof Kozlowski @ 2024-06-27 7:38 UTC (permalink / raw)
To: Conor Dooley, devicetree
Cc: Conor Dooley, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Nicolas Ferre, Alexandre Belloni, Claudiu Beznea, Lars Povlsen,
Steen Hegelund, Daniel Machon
On 26/06/2024 17:54, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> I noticed that there's technically not an explicit maintainer for this
> directory, even if the files currently in it are covered by either the
> Mircochip FPGA or AT91 entries. Add it to the entry covering the
> corresponding driver directory.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 1/2] MAINTAINERS: add microchip soc binding directory to microchip soc driver entry
2024-06-26 15:54 [PATCH 1/2] MAINTAINERS: add microchip soc binding directory to microchip soc driver entry Conor Dooley
` (3 preceding siblings ...)
2024-06-27 7:38 ` Krzysztof Kozlowski
@ 2024-06-27 16:28 ` Conor Dooley
4 siblings, 0 replies; 7+ messages in thread
From: Conor Dooley @ 2024-06-27 16:28 UTC (permalink / raw)
To: devicetree, Conor Dooley
Cc: Conor Dooley, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Nicolas Ferre, Alexandre Belloni, Claudiu Beznea, Lars Povlsen,
Steen Hegelund, Daniel Machon
From: Conor Dooley <conor.dooley@microchip.com>
On Wed, 26 Jun 2024 16:54:16 +0100, Conor Dooley wrote:
> I noticed that there's technically not an explicit maintainer for this
> directory, even if the files currently in it are covered by either the
> Mircochip FPGA or AT91 entries. Add it to the entry covering the
> corresponding driver directory.
>
>
Applied to riscv-cache-for-next, thanks!
[2/2] MAINTAINERS: add cache binding directory to cache driver entry
https://git.kernel.org/conor/c/4ca47d8bcca0
Thanks,
Conor.
^ permalink raw reply [flat|nested] 7+ messages in thread