From: Jonathan Cameron <jic23@kernel.org>
To: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Zhang Rui <rui.zhang@intel.com>,
Lukasz Luba <lukasz.luba@arm.com>,
Amit Kucheria <amitk@kernel.org>,
"Thara Gopinath" <thara.gopinath@gmail.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Kamal Wadhwa <quic_kamalw@quicinc.com>,
Taniya Das <quic_tdas@quicinc.com>,
Jishnu Prakash <quic_jprakash@quicinc.com>,
<linux-kernel@vger.kernel.org>, <linux-iio@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>,
<linux-pm@vger.kernel.org>, Ajit Pandey <quic_ajipan@quicinc.com>,
"Imran Shaik" <quic_imrashai@quicinc.com>,
Jagadeesh Kona <quic_jkona@quicinc.com>
Subject: Re: [PATCH 1/5] dt-bindings: iio: adc: Add ADC5 GEN3 Channel info for pm8775 PMIC
Date: Sat, 13 Jul 2024 13:00:24 +0100 [thread overview]
Message-ID: <20240713130024.27b9d8e5@jic23-huawei> (raw)
In-Reply-To: <20240712-mbg-tm-support-v1-1-7d78bec920ca@quicinc.com>
On Fri, 12 Jul 2024 18:13:28 +0530
Satya Priya Kakitapalli <quic_skakitap@quicinc.com> wrote:
> Add definitions for ADC5 GEN3 virtual channels(combination of ADC channel
> number and PMIC SID number) used by PM8775.
>
> Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
as I presume this will go with the rest via the thermal tree.
> ---
> .../iio/adc/qcom,spmi-adc5-gen3-pm8775.h | 42 ++++++++++++++++++++++
> 1 file changed, 42 insertions(+)
>
> diff --git a/include/dt-bindings/iio/adc/qcom,spmi-adc5-gen3-pm8775.h b/include/dt-bindings/iio/adc/qcom,spmi-adc5-gen3-pm8775.h
> new file mode 100644
> index 000000000000..84ab07ed73cc
> --- /dev/null
> +++ b/include/dt-bindings/iio/adc/qcom,spmi-adc5-gen3-pm8775.h
> @@ -0,0 +1,42 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +/*
> + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
> + */
> +
> +#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM8775_H
> +#define _DT_BINDINGS_QCOM_SPMI_VADC_PM8775_H
> +
> +#include <dt-bindings/iio/adc/qcom,spmi-vadc.h>
> +
> +/* ADC channels for PM8775_ADC for PMIC5 Gen3 */
> +#define PM8775_ADC5_GEN3_REF_GND(sid) ((sid) << 8 | ADC5_GEN3_REF_GND)
> +#define PM8775_ADC5_GEN3_1P25VREF(sid) ((sid) << 8 | ADC5_GEN3_1P25VREF)
> +#define PM8775_ADC5_GEN3_VREF_VADC(sid) ((sid) << 8 | ADC5_GEN3_VREF_VADC)
> +#define PM8775_ADC5_GEN3_DIE_TEMP(sid) ((sid) << 8 | ADC5_GEN3_DIE_TEMP)
> +
> +#define PM8775_ADC5_GEN3_AMUX1_THM(sid) ((sid) << 8 | ADC5_GEN3_AMUX1_THM)
> +#define PM8775_ADC5_GEN3_AMUX2_THM(sid) ((sid) << 8 | ADC5_GEN3_AMUX2_THM)
> +#define PM8775_ADC5_GEN3_AMUX3_THM(sid) ((sid) << 8 | ADC5_GEN3_AMUX3_THM)
> +#define PM8775_ADC5_GEN3_AMUX4_THM(sid) ((sid) << 8 | ADC5_GEN3_AMUX4_THM)
> +#define PM8775_ADC5_GEN3_AMUX5_THM(sid) ((sid) << 8 | ADC5_GEN3_AMUX5_THM)
> +#define PM8775_ADC5_GEN3_AMUX6_THM(sid) ((sid) << 8 | ADC5_GEN3_AMUX6_THM)
> +#define PM8775_ADC5_GEN3_AMUX1_GPIO9(sid) ((sid) << 8 | ADC5_GEN3_AMUX1_GPIO)
> +#define PM8775_ADC5_GEN3_AMUX2_GPIO10(sid) ((sid) << 8 | ADC5_GEN3_AMUX2_GPIO)
> +#define PM8775_ADC5_GEN3_AMUX3_GPIO11(sid) ((sid) << 8 | ADC5_GEN3_AMUX3_GPIO)
> +#define PM8775_ADC5_GEN3_AMUX4_GPIO12(sid) ((sid) << 8 | ADC5_GEN3_AMUX4_GPIO)
> +
> +/* 100k pull-up2 */
> +#define PM8775_ADC5_GEN3_AMUX1_THM_100K_PU(sid) ((sid) << 8 | ADC5_GEN3_AMUX1_THM_100K_PU)
> +#define PM8775_ADC5_GEN3_AMUX2_THM_100K_PU(sid) ((sid) << 8 | ADC5_GEN3_AMUX2_THM_100K_PU)
> +#define PM8775_ADC5_GEN3_AMUX3_THM_100K_PU(sid) ((sid) << 8 | ADC5_GEN3_AMUX3_THM_100K_PU)
> +#define PM8775_ADC5_GEN3_AMUX4_THM_100K_PU(sid) ((sid) << 8 | ADC5_GEN3_AMUX4_THM_100K_PU)
> +#define PM8775_ADC5_GEN3_AMUX5_THM_100K_PU(sid) ((sid) << 8 | ADC5_GEN3_AMUX5_THM_100K_PU)
> +#define PM8775_ADC5_GEN3_AMUX6_THM_100K_PU(sid) ((sid) << 8 | ADC5_GEN3_AMUX6_THM_100K_PU)
> +#define PM8775_ADC5_GEN3_AMUX1_GPIO9_100K_PU(sid) ((sid) << 8 | ADC5_GEN3_AMUX1_GPIO_100K_PU)
> +#define PM8775_ADC5_GEN3_AMUX2_GPIO10_100K_PU(sid) ((sid) << 8 | ADC5_GEN3_AMUX2_GPIO_100K_PU)
> +#define PM8775_ADC5_GEN3_AMUX3_GPIO11_100K_PU(sid) ((sid) << 8 | ADC5_GEN3_AMUX3_GPIO_100K_PU)
> +#define PM8775_ADC5_GEN3_AMUX4_GPIO12_100K_PU(sid) ((sid) << 8 | ADC5_GEN3_AMUX4_GPIO_100K_PU)
> +
> +#define PM8775_ADC5_GEN3_VPH_PWR(sid) ((sid) << 8 | ADC5_GEN3_VPH_PWR)
> +
> +#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8775_H */
>
next prev parent reply other threads:[~2024-07-13 12:00 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-12 12:43 [PATCH 0/5] Add support for MBG Thermal monitoring device Satya Priya Kakitapalli
2024-07-12 12:43 ` [PATCH 1/5] dt-bindings: iio: adc: Add ADC5 GEN3 Channel info for pm8775 PMIC Satya Priya Kakitapalli
2024-07-12 17:06 ` Krzysztof Kozlowski
2024-07-13 12:00 ` Jonathan Cameron [this message]
2024-07-12 12:43 ` [PATCH 2/5] dt-bindings: thermal: qcom: Add MBG thermal monitor bindings Satya Priya Kakitapalli
2024-07-12 14:34 ` Rob Herring (Arm)
2024-07-12 17:25 ` Krzysztof Kozlowski
2024-07-12 17:37 ` Konrad Dybcio
2024-07-13 16:14 ` Dmitry Baryshkov
2024-11-19 7:57 ` Satya Priya Kakitapalli
2024-07-12 12:43 ` [PATCH 3/5] thermal: qcom: Add support for MBG Temp monitor Satya Priya Kakitapalli
2024-07-13 11:59 ` Jonathan Cameron
2024-11-19 8:00 ` Satya Priya Kakitapalli
2024-07-15 8:26 ` Konrad Dybcio
2024-07-12 12:43 ` [PATCH 4/5] ARM: dts: qcom: Add vadc support for pm8775 pmic on SA8775P Satya Priya Kakitapalli
2024-07-12 17:13 ` Krzysztof Kozlowski
2024-07-12 12:43 ` [PATCH 5/5] ARM: dts: qcom: Add support for MBG TM for pm8775 " Satya Priya Kakitapalli
2024-07-12 17:15 ` Krzysztof Kozlowski
2024-07-12 19:43 ` Konrad Dybcio
2024-07-12 14:39 ` [PATCH 0/5] Add support for MBG Thermal monitoring device neil.armstrong
2024-11-19 8:06 ` Satya Priya Kakitapalli
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