From: Manorit Chawdhry <m-chawdhry@ti.com>
To: Nishanth Menon <nm@ti.com>, Vignesh Raghavendra <vigneshr@ti.com>,
Tero Kristo <kristo@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Udit Kumar <u-kumar1@ti.com>,
Neha Malcom Francis <n-francis@ti.com>,
Aniket Limaye <a-limaye@ti.com>,
Manorit Chawdhry <m-chawdhry@ti.com>
Subject: [PATCH v3 3/9] arm64: dts: ti: Split k3-j784s4-j742s2-common.dtsi
Date: Wed, 31 Jul 2024 22:40:29 +0530 [thread overview]
Message-ID: <20240731-b4-upstream-j742s2-v3-3-da7fe3aa9e90@ti.com> (raw)
In-Reply-To: <20240731-b4-upstream-j742s2-v3-0-da7fe3aa9e90@ti.com>
k3-j784s4-j742s2-common.dtsi will be included in k3-j742s2.dtsi at a
later point so move j784s4 related stuff to k3-j784s4.dtsi
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
---
.../arm64/boot/dts/ti/k3-j784s4-j742s2-common.dtsi | 156 --------------------
arch/arm64/boot/dts/ti/k3-j784s4.dtsi | 158 +++++++++++++++++++++
2 files changed, 158 insertions(+), 156 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-common.dtsi
index 76e43ee44496..958054ab1018 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-common.dtsi
@@ -15,166 +15,10 @@
#include "k3-pinctrl.h"
/ {
- model = "Texas Instruments K3 J784S4 SoC";
- compatible = "ti,j784s4";
interrupt-parent = <&gic500>;
#address-cells = <2>;
#size-cells = <2>;
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
- cpu-map {
- cluster0: cluster0 {
- core0 {
- cpu = <&cpu0>;
- };
-
- core1 {
- cpu = <&cpu1>;
- };
-
- core2 {
- cpu = <&cpu2>;
- };
-
- core3 {
- cpu = <&cpu3>;
- };
- };
-
- cluster1: cluster1 {
- core0 {
- cpu = <&cpu4>;
- };
-
- core1 {
- cpu = <&cpu5>;
- };
-
- core2 {
- cpu = <&cpu6>;
- };
-
- core3 {
- cpu = <&cpu7>;
- };
- };
- };
-
- cpu0: cpu@0 {
- compatible = "arm,cortex-a72";
- reg = <0x000>;
- device_type = "cpu";
- enable-method = "psci";
- i-cache-size = <0xc000>;
- i-cache-line-size = <64>;
- i-cache-sets = <256>;
- d-cache-size = <0x8000>;
- d-cache-line-size = <64>;
- d-cache-sets = <256>;
- next-level-cache = <&L2_0>;
- };
-
- cpu1: cpu@1 {
- compatible = "arm,cortex-a72";
- reg = <0x001>;
- device_type = "cpu";
- enable-method = "psci";
- i-cache-size = <0xc000>;
- i-cache-line-size = <64>;
- i-cache-sets = <256>;
- d-cache-size = <0x8000>;
- d-cache-line-size = <64>;
- d-cache-sets = <256>;
- next-level-cache = <&L2_0>;
- };
-
- cpu2: cpu@2 {
- compatible = "arm,cortex-a72";
- reg = <0x002>;
- device_type = "cpu";
- enable-method = "psci";
- i-cache-size = <0xc000>;
- i-cache-line-size = <64>;
- i-cache-sets = <256>;
- d-cache-size = <0x8000>;
- d-cache-line-size = <64>;
- d-cache-sets = <256>;
- next-level-cache = <&L2_0>;
- };
-
- cpu3: cpu@3 {
- compatible = "arm,cortex-a72";
- reg = <0x003>;
- device_type = "cpu";
- enable-method = "psci";
- i-cache-size = <0xc000>;
- i-cache-line-size = <64>;
- i-cache-sets = <256>;
- d-cache-size = <0x8000>;
- d-cache-line-size = <64>;
- d-cache-sets = <256>;
- next-level-cache = <&L2_0>;
- };
-
- cpu4: cpu@100 {
- compatible = "arm,cortex-a72";
- reg = <0x100>;
- device_type = "cpu";
- enable-method = "psci";
- i-cache-size = <0xc000>;
- i-cache-line-size = <64>;
- i-cache-sets = <256>;
- d-cache-size = <0x8000>;
- d-cache-line-size = <64>;
- d-cache-sets = <256>;
- next-level-cache = <&L2_1>;
- };
-
- cpu5: cpu@101 {
- compatible = "arm,cortex-a72";
- reg = <0x101>;
- device_type = "cpu";
- enable-method = "psci";
- i-cache-size = <0xc000>;
- i-cache-line-size = <64>;
- i-cache-sets = <256>;
- d-cache-size = <0x8000>;
- d-cache-line-size = <64>;
- d-cache-sets = <256>;
- next-level-cache = <&L2_1>;
- };
-
- cpu6: cpu@102 {
- compatible = "arm,cortex-a72";
- reg = <0x102>;
- device_type = "cpu";
- enable-method = "psci";
- i-cache-size = <0xc000>;
- i-cache-line-size = <64>;
- i-cache-sets = <256>;
- d-cache-size = <0x8000>;
- d-cache-line-size = <64>;
- d-cache-sets = <256>;
- next-level-cache = <&L2_1>;
- };
-
- cpu7: cpu@103 {
- compatible = "arm,cortex-a72";
- reg = <0x103>;
- device_type = "cpu";
- enable-method = "psci";
- i-cache-size = <0xc000>;
- i-cache-line-size = <64>;
- i-cache-sets = <256>;
- d-cache-size = <0x8000>;
- d-cache-line-size = <64>;
- d-cache-sets = <256>;
- next-level-cache = <&L2_1>;
- };
- };
-
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
index 46cff5ed3730..16ade4fd9cbd 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
@@ -10,3 +10,161 @@
#include "k3-j784s4-j742s2-common.dtsi"
+/ {
+ model = "Texas Instruments K3 J784S4 SoC";
+ compatible = "ti,j784s4";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu-map {
+ cluster0: cluster0 {
+ core0 {
+ cpu = <&cpu0>;
+ };
+
+ core1 {
+ cpu = <&cpu1>;
+ };
+
+ core2 {
+ cpu = <&cpu2>;
+ };
+
+ core3 {
+ cpu = <&cpu3>;
+ };
+ };
+
+ cluster1: cluster1 {
+ core0 {
+ cpu = <&cpu4>;
+ };
+
+ core1 {
+ cpu = <&cpu5>;
+ };
+
+ core2 {
+ cpu = <&cpu6>;
+ };
+
+ core3 {
+ cpu = <&cpu7>;
+ };
+ };
+ };
+
+ cpu0: cpu@0 {
+ compatible = "arm,cortex-a72";
+ reg = <0x000>;
+ device_type = "cpu";
+ enable-method = "psci";
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ next-level-cache = <&L2_0>;
+ };
+
+ cpu1: cpu@1 {
+ compatible = "arm,cortex-a72";
+ reg = <0x001>;
+ device_type = "cpu";
+ enable-method = "psci";
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ next-level-cache = <&L2_0>;
+ };
+
+ cpu2: cpu@2 {
+ compatible = "arm,cortex-a72";
+ reg = <0x002>;
+ device_type = "cpu";
+ enable-method = "psci";
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ next-level-cache = <&L2_0>;
+ };
+
+ cpu3: cpu@3 {
+ compatible = "arm,cortex-a72";
+ reg = <0x003>;
+ device_type = "cpu";
+ enable-method = "psci";
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ next-level-cache = <&L2_0>;
+ };
+
+ cpu4: cpu@100 {
+ compatible = "arm,cortex-a72";
+ reg = <0x100>;
+ device_type = "cpu";
+ enable-method = "psci";
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ next-level-cache = <&L2_1>;
+ };
+
+ cpu5: cpu@101 {
+ compatible = "arm,cortex-a72";
+ reg = <0x101>;
+ device_type = "cpu";
+ enable-method = "psci";
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ next-level-cache = <&L2_1>;
+ };
+
+ cpu6: cpu@102 {
+ compatible = "arm,cortex-a72";
+ reg = <0x102>;
+ device_type = "cpu";
+ enable-method = "psci";
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ next-level-cache = <&L2_1>;
+ };
+
+ cpu7: cpu@103 {
+ compatible = "arm,cortex-a72";
+ reg = <0x103>;
+ device_type = "cpu";
+ enable-method = "psci";
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ next-level-cache = <&L2_1>;
+ };
+ };
+};
--
2.45.1
next prev parent reply other threads:[~2024-07-31 17:10 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-31 17:10 [PATCH v3 0/9] Introduce J742S2 SoC and EVM Manorit Chawdhry
2024-07-31 17:10 ` [PATCH v3 1/9] arm64: dts: ti: Move j784s4-{} include files to j784s4-j742s2-{}-common.dtsi Manorit Chawdhry
2024-07-31 17:10 ` [PATCH v3 2/9] arm64: dts: ti: Move k3-j784s4.dtsi to k3-j784s4-j742s2-common.dtsi Manorit Chawdhry
2024-07-31 17:10 ` Manorit Chawdhry [this message]
2024-07-31 17:10 ` [PATCH v3 4/9] arm64: dts: ti: Split k3-j784s4-j742s2-main-common.dtsi Manorit Chawdhry
2024-08-07 13:09 ` Nishanth Menon
2024-08-07 13:20 ` Nishanth Menon
2024-08-08 4:52 ` Manorit Chawdhry
2024-08-08 5:28 ` Siddharth Vadapalli
2024-08-08 10:54 ` Nishanth Menon
2024-08-08 4:56 ` Manorit Chawdhry
2024-08-08 10:48 ` Nishanth Menon
2024-07-31 17:10 ` [PATCH v3 5/9] arm64: dts: ti: Move k3-j784s4-evm.dts to k3-j784s4-j742s2-evm-common.dtsi Manorit Chawdhry
2024-07-31 17:10 ` [PATCH v3 6/9] arm64: dts: ti: Split k3-j784s4-j742s2-evm-common.dtsi Manorit Chawdhry
2024-08-07 13:06 ` Nishanth Menon
2024-07-31 17:10 ` [PATCH v3 7/9] dt-bindings: arm: ti: Add bindings for J742S2 SoCs and Boards Manorit Chawdhry
2024-07-31 17:10 ` [PATCH v3 8/9] arm64: dts: ti: Introduce J742S2 SoC family Manorit Chawdhry
2024-07-31 17:10 ` [PATCH v3 9/9] arm64: dts: ti: Add support for J742S2 EVM board Manorit Chawdhry
2024-08-07 9:41 ` Beleswar Prasad Padhi
2024-08-07 11:51 ` Nishanth Menon
2024-08-07 12:06 ` Nishanth Menon
2024-08-07 13:25 ` [PATCH v3 0/9] Introduce J742S2 SoC and EVM Nishanth Menon
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