From: Conor Dooley <conor@kernel.org>
To: Inochi Amaoto <inochiama@gmail.com>
Cc: Chen Wang <unicorn_wang@outlook.com>,
Thomas Gleixner <tglx@linutronix.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Peter Zijlstra <peterz@infradead.org>,
Inochi Amaoto <inochiama@outlook.com>,
Guo Ren <guoren@kernel.org>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
Hal Feng <hal.feng@starfivetech.com>,
Heikki Krogerus <heikki.krogerus@linux.intel.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Yixun Lan <dlan@gentoo.org>,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org
Subject: Re: [PATCH 1/3] dt-bindings: interrupt-controller: Add Sophgo SG2044 ACLINT SSWI
Date: Fri, 4 Oct 2024 16:44:22 +0100 [thread overview]
Message-ID: <20241004-patronize-doily-8406fa214347@spud> (raw)
In-Reply-To: <20241004080557.2262872-2-inochiama@gmail.com>
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On Fri, Oct 04, 2024 at 04:05:55PM +0800, Inochi Amaoto wrote:
> Sophgo SG2044 has a new version of T-HEAD C920, which implement
> a fully featured ACLINT device. This ACLINT has an extra SSWI
> field to support fast S-mode IPI.
>
> Add necessary compatible string for the T-HEAD ACLINT sswi device.
>
> Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
> ---
> .../thead,c900-aclint-sswi.yaml | 58 +++++++++++++++++++
> 1 file changed, 58 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml b/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml
> new file mode 100644
> index 000000000000..0106fbf3ea1f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml
> @@ -0,0 +1,58 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/interrupt-controller/thead,c900-aclint-sswi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Sophgo sg2044 ACLINT Supervisor-level Software Interrupt Device
> +
> +maintainers:
> + - Inochi Amaoto <inochiama@outlook.com>
> +
> +description:
> + The SSWI device is a part of the riscv ACLINT device. It provides
> + supervisor-level IPI functionality for a set of HARTs on a RISC-V
> + platform. It provides a register to set an IPI (SETSSIP) for each
> + HART connected to the SSWI device.
If it is part of the aclint, why should it have a separate node, rather
than be part of the existing aclint node as a third reg property?
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next prev parent reply other threads:[~2024-10-04 15:44 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-04 8:05 [PATCH 0/3] riscv: interrupt-controller: Add T-HEAD C900 ACLINT SSWI Inochi Amaoto
2024-10-04 8:05 ` [PATCH 1/3] dt-bindings: interrupt-controller: Add Sophgo SG2044 " Inochi Amaoto
2024-10-04 15:44 ` Conor Dooley [this message]
2024-10-05 0:46 ` Inochi Amaoto
2024-10-10 16:16 ` Conor Dooley
2024-10-04 8:05 ` [PATCH 2/3] irqchip: add T-HEAD C900 ACLINT SSWI driver Inochi Amaoto
2024-10-06 19:50 ` Thomas Gleixner
2024-10-07 0:38 ` Inochi Amaoto
2024-10-04 8:05 ` [PATCH 3/3] riscv: defconfig: Enable T-HEAD C900 ACLINT SSWI drivers Inochi Amaoto
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