From: Bjorn Helgaas <helgaas@kernel.org>
To: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Cc: andersson@kernel.org, "Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Konrad Dybcio" <konradybcio@kernel.org>,
cros-qcom-dts-watchers@chromium.org,
"Jingoo Han" <jingoohan1@gmail.com>,
"Bartosz Golaszewski" <brgl@bgdev.pl>,
quic_vbadigan@quicinc.com, linux-arm-msm@vger.kernel.org,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 6/6] PCI: pwrctl: Add power control driver for qps615
Date: Wed, 4 Dec 2024 15:19:16 -0600 [thread overview]
Message-ID: <20241204211916.GA3009300@bhelgaas> (raw)
In-Reply-To: <20241112-qps615_pwr-v3-6-29a1e98aa2b0@quicinc.com>
On Tue, Nov 12, 2024 at 08:31:38PM +0530, Krishna chaitanya chundru wrote:
> QPS615 is the PCIe switch which has one upstream and three downstream
> ports. To one of the downstream ports ethernet MAC is connected as endpoint
> device. Other two downstream ports are supposed to connect to external
> device. One Host can connect to QPS615 by upstream port. QPS615 switch
> needs to be configured after powering on and before PCIe link was up.
s/is the/is a/
> The PCIe controller driver already enables link training at the host side
> even before qps615 driver probe happens, due to this when driver enables
> power to the switch it participates in the link training and PCIe link
> may come up before configuring the switch through i2c. To prevent the
> host from participating in link training, disable link training on the
> host side to ensure the link does not come up before the switch is
> configured via I2C.
>
> Based up on dt property and type of the port, qps615 is configured
> through i2c.
> +config PCI_PWRCTL_QPS615
> + tristate "PCI Power Control driver for QPS615"
> + select PCI_PWRCTL
> + help
> + Say Y here to enable the pwrctl driver for Qualcomm
> + QPS615 PCIe switch which enables and configures it
> + through i2c.
Does this work if build as a module? I guess maybe the QPS615 doesn't
even get powered on without this, so it would be configured and then
powered on after module-load time?
s/pwrctl/pwrctrl/ (also in filename, code, variables, etc below)
Will need to be rebased to account for the pwrctl -> pwrctrl rename in
v6.13-rc1.
> +static int qps615_pwrctl_power_on(struct qps615_pwrctl_ctx *ctx)
> +{
> + struct qps615_pwrctl_cfg *cfg;
> + int ret, i;
> +
> + ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
> + if (ret < 0)
> + return dev_err_probe(ctx->pwrctl.dev, ret, "cannot enable regulators\n");
> +
> + gpiod_set_value(ctx->reset_gpio, 0);
> +
> + /* wait for the internal osc frequency to stablise */
s/stablise/stabilise/
> + usleep_range(10000, 10500);
> +
> + ret = qps615_pwrctl_assert_deassert_reset(ctx, false);
> + if (ret)
> + goto out;
> +
> + if (ctx->cfg[QPS615_USP].axi_freq_125) {
> + ret = qps615_pwrctl_i2c_write(ctx->client, QPS615_BUS_CONTROL, BIT(16));
> + if (ret)
> + dev_err(ctx->pwrctl.dev, "Setting AXI clk freq failed %d\n", ret);
> + }
> +
> + for (i = 0; i < QPS615_MAX; i++) {
> + cfg = &ctx->cfg[i];
> + if (cfg->disable_port) {
> + ret = qps615_pwrctl_disable_port(ctx, i);
> + if (ret) {
> + dev_err(ctx->pwrctl.dev, "Disabling port failed\n");
> + goto out;
> + }
> + }
A helper function could remove a level of indentation for the body of
this loop.
> +static int qps615_pwrctl_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct pci_host_bridge *bridge;
> + enum qps615_pwrctl_ports port;
> + struct qps615_pwrctl_ctx *ctx;
> + int ret, addr;
> +
> + bridge = pci_find_host_bridge(to_pci_dev(dev->parent)->bus);
Move to where "bridge" is used.
> + platform_set_drvdata(pdev, ctx);
Can this be moved to the point where we know we won't return an error?
Bjorn
prev parent reply other threads:[~2024-12-04 21:19 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-12 15:01 [PATCH v3 0/6] PCI: Enable Power and configure the QPS615 PCIe switch Krishna chaitanya chundru
2024-11-12 15:01 ` [PATCH v3 1/6] dt-bindings: PCI: Add binding for qps615 Krishna chaitanya chundru
2024-11-12 15:49 ` Bjorn Andersson
2024-11-15 16:18 ` Rob Herring
2024-11-24 1:32 ` Krishna Chaitanya Chundru
2024-12-04 8:49 ` Krishna Chaitanya Chundru
2024-12-23 16:45 ` Krishna Chaitanya Chundru
2025-02-10 7:51 ` Manivannan Sadhasivam
2025-02-10 9:37 ` Krishna Chaitanya Chundru
2024-12-23 18:57 ` Dmitry Baryshkov
2024-12-24 6:04 ` Krishna Chaitanya Chundru
2024-12-24 6:54 ` Dmitry Baryshkov
2024-12-24 9:09 ` Krishna Chaitanya Chundru
2024-12-24 9:47 ` Dmitry Baryshkov
2024-12-27 2:14 ` Krishna Chaitanya Chundru
2024-12-30 18:30 ` Dmitry Baryshkov
2024-12-30 18:22 ` Manivannan Sadhasivam
2025-01-07 14:28 ` Krishna Chaitanya Chundru
2025-02-10 7:58 ` Manivannan Sadhasivam
2025-02-10 10:13 ` Krishna Chaitanya Chundru
2024-11-20 8:04 ` Krzysztof Kozlowski
2024-11-24 1:41 ` Krishna Chaitanya Chundru
2024-11-25 7:40 ` Krzysztof Kozlowski
2024-11-26 6:50 ` Krishna Chaitanya Chundru
2024-11-26 6:58 ` Krzysztof Kozlowski
2024-11-28 13:24 ` Manivannan Sadhasivam
2024-11-28 14:08 ` Dmitry Baryshkov
2024-12-03 9:06 ` Krishna Chaitanya Chundru
2024-12-04 21:25 ` Bjorn Helgaas
2024-12-11 6:00 ` Manivannan Sadhasivam
2024-12-23 16:48 ` Krishna Chaitanya Chundru
2024-12-23 18:58 ` Dmitry Baryshkov
2024-12-24 9:11 ` Krishna Chaitanya Chundru
2024-12-24 9:49 ` Dmitry Baryshkov
2025-01-07 22:42 ` Bjorn Helgaas
2025-01-15 17:23 ` Manivannan Sadhasivam
2024-11-12 15:01 ` [PATCH v3 2/6] arm64: dts: qcom: qcs6490-rb3gen2: Add node " Krishna chaitanya chundru
2024-11-12 15:49 ` Bjorn Andersson
2024-11-15 11:45 ` Manivannan Sadhasivam
2024-11-20 8:06 ` Krzysztof Kozlowski
2024-11-20 11:03 ` Dmitry Baryshkov
2024-11-20 13:28 ` Krzysztof Kozlowski
2024-11-21 22:44 ` Dmitry Baryshkov
2024-11-12 15:01 ` [PATCH v3 3/6] PCI: Add new start_link() & stop_link function ops Krishna chaitanya chundru
2024-11-12 23:41 ` Bjorn Helgaas
2024-11-13 8:41 ` Krishna Chaitanya Chundru
2024-11-15 11:51 ` Manivannan Sadhasivam
2024-11-12 15:01 ` [PATCH v3 4/6] PCI: dwc: Add support for new pci function op Krishna chaitanya chundru
2024-11-12 23:32 ` Bjorn Helgaas
2024-11-12 15:01 ` [PATCH v3 5/6] PCI: qcom: Add support for host_stop_link() & host_start_link() Krishna chaitanya chundru
2024-11-12 23:36 ` Bjorn Helgaas
2024-11-15 11:57 ` Manivannan Sadhasivam
2024-11-24 1:44 ` Krishna Chaitanya Chundru
2024-11-12 15:01 ` [PATCH v3 6/6] PCI: pwrctl: Add power control driver for qps615 Krishna chaitanya chundru
2024-11-12 15:51 ` Bjorn Andersson
2024-11-12 23:21 ` Bjorn Andersson
2024-11-13 13:38 ` Bartosz Golaszewski
2024-11-15 12:25 ` Manivannan Sadhasivam
2024-11-20 14:59 ` Uwe Kleine-König
2024-12-04 21:19 ` Bjorn Helgaas [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20241204211916.GA3009300@bhelgaas \
--to=helgaas@kernel.org \
--cc=andersson@kernel.org \
--cc=bhelgaas@google.com \
--cc=brgl@bgdev.pl \
--cc=conor+dt@kernel.org \
--cc=cros-qcom-dts-watchers@chromium.org \
--cc=devicetree@vger.kernel.org \
--cc=jingoohan1@gmail.com \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=kw@linux.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lpieralisi@kernel.org \
--cc=manivannan.sadhasivam@linaro.org \
--cc=quic_krichai@quicinc.com \
--cc=quic_vbadigan@quicinc.com \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox