* [PATCH 0/3] Add RZ/G3E RIIC support
@ 2024-12-16 12:00 Biju Das
2024-12-16 12:00 ` [PATCH 1/3] dt-bindings: i2c: renesas,riic: Document the R9A09G047 support Biju Das
2024-12-16 12:00 ` [PATCH 3/3] arm64: dts: renesas: r9a09g047: Add I2C nodes Biju Das
0 siblings, 2 replies; 8+ messages in thread
From: Biju Das @ 2024-12-16 12:00 UTC (permalink / raw)
To: Andi Shyti, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Biju Das, Chris Brandt, Geert Uytterhoeven, Magnus Damm,
Wolfram Sang, linux-renesas-soc, linux-i2c, devicetree,
Prabhakar Mahadev Lad, Biju Das
Add support for the I2C Bus Interface (RIIC) found in the Renesas
RZ/G3E (R9A09G047) SoC. This IP is compatible with Renesas RZ/V2H
(R9A09G057) RIIC IP.
Note:
This patch series depend on [1] for clk and [2] for soc dtsi
[1] https://lore.kernel.org/all/20241213123550.289193-1-biju.das.jz@bp.renesas.com/
[2] https://lore.kernel.org/all/20241213173901.599226-7-biju.das.jz@bp.renesas.com/#t
Biju Das (3):
dt-bindings: i2c: renesas,riic: Document the R9A09G047 support
clk: renesas: r9a09g047: Add I2C clocks/resets
arm64: dts: renesas: r9a09g047: Add I2C nodes
.../devicetree/bindings/i2c/renesas,riic.yaml | 4 +-
arch/arm64/boot/dts/renesas/r9a09g047.dtsi | 189 ++++++++++++++++++
drivers/clk/renesas/r9a09g047-cpg.c | 32 +++
3 files changed, 224 insertions(+), 1 deletion(-)
--
2.43.0
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/3] dt-bindings: i2c: renesas,riic: Document the R9A09G047 support
2024-12-16 12:00 [PATCH 0/3] Add RZ/G3E RIIC support Biju Das
@ 2024-12-16 12:00 ` Biju Das
2024-12-16 16:18 ` Geert Uytterhoeven
` (2 more replies)
2024-12-16 12:00 ` [PATCH 3/3] arm64: dts: renesas: r9a09g047: Add I2C nodes Biju Das
1 sibling, 3 replies; 8+ messages in thread
From: Biju Das @ 2024-12-16 12:00 UTC (permalink / raw)
To: Andi Shyti, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Biju Das, Chris Brandt, Geert Uytterhoeven, Magnus Damm,
Wolfram Sang, linux-renesas-soc, linux-i2c, devicetree,
Prabhakar Mahadev Lad, Biju Das
Document support for the I2C Bus Interface (RIIC) found in the Renesas
RZ/G3E (R9A09G047) SoC. This IP is compatible with Renesas RZ/V2H
(R9A09G057) RIIC IP.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
Documentation/devicetree/bindings/i2c/renesas,riic.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/i2c/renesas,riic.yaml b/Documentation/devicetree/bindings/i2c/renesas,riic.yaml
index 505a8ec92266..830d5baa32c8 100644
--- a/Documentation/devicetree/bindings/i2c/renesas,riic.yaml
+++ b/Documentation/devicetree/bindings/i2c/renesas,riic.yaml
@@ -26,7 +26,9 @@ properties:
- const: renesas,riic-rz # RZ/A or RZ/G2L
- items:
- - const: renesas,riic-r9a08g045 # RZ/G3S
+ - enum:
+ - renesas,riic-r9a08g045 # RZ/G3S
+ - renesas,riic-r9a09g047 # RZ/G3E
- const: renesas,riic-r9a09g057 # RZ/V2H(P)
- const: renesas,riic-r9a09g057 # RZ/V2H(P)
--
2.43.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 3/3] arm64: dts: renesas: r9a09g047: Add I2C nodes
2024-12-16 12:00 [PATCH 0/3] Add RZ/G3E RIIC support Biju Das
2024-12-16 12:00 ` [PATCH 1/3] dt-bindings: i2c: renesas,riic: Document the R9A09G047 support Biju Das
@ 2024-12-16 12:00 ` Biju Das
2024-12-16 16:45 ` Geert Uytterhoeven
1 sibling, 1 reply; 8+ messages in thread
From: Biju Das @ 2024-12-16 12:00 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, linux-renesas-soc,
devicetree, Prabhakar Mahadev Lad, Biju Das
Add I2C{0..8} nodes to RZ/G3E (R9A09G047) SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a09g047.dtsi | 189 +++++++++++++++++++++
1 file changed, 189 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
index 15711f9b6038..200e9ea89193 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
@@ -175,6 +175,195 @@ scif0: serial@11c01400 {
status = "disabled";
};
+ i2c0: i2c@14400400 {
+ compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
+ reg = <0 0x14400400 0 0x400>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 507 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 506 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tei", "ri", "ti", "spi", "sti",
+ "naki", "ali", "tmoi";
+ clocks = <&cpg CPG_MOD 0x94>;
+ resets = <&cpg 0x98>;
+ power-domains = <&cpg>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@14400800 {
+ compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
+ reg = <0 0x14400800 0 0x400>;
+ interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 509 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 508 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tei", "ri", "ti", "spi", "sti",
+ "naki", "ali", "tmoi";
+ clocks = <&cpg CPG_MOD 0x95>;
+ resets = <&cpg 0x99>;
+ power-domains = <&cpg>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@14400c00 {
+ compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
+ reg = <0 0x14400c00 0 0x400>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 511 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 510 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tei", "ri", "ti", "spi", "sti",
+ "naki", "ali", "tmoi";
+ clocks = <&cpg CPG_MOD 0x96>;
+ resets = <&cpg 0x9a>;
+ power-domains = <&cpg>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@14401000 {
+ compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
+ reg = <0 0x14401000 0 0x400>;
+ interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 513 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 512 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tei", "ri", "ti", "spi", "sti",
+ "naki", "ali", "tmoi";
+ clocks = <&cpg CPG_MOD 0x97>;
+ resets = <&cpg 0x9b>;
+ power-domains = <&cpg>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c4: i2c@14401400 {
+ compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
+ reg = <0 0x14401400 0 0x400>;
+ interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 515 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 514 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tei", "ri", "ti", "spi", "sti",
+ "naki", "ali", "tmoi";
+ clocks = <&cpg CPG_MOD 0x98>;
+ resets = <&cpg 0x9c>;
+ power-domains = <&cpg>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c5: i2c@14401800 {
+ compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
+ reg = <0 0x14401800 0 0x400>;
+ interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 517 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 516 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tei", "ri", "ti", "spi", "sti",
+ "naki", "ali", "tmoi";
+ clocks = <&cpg CPG_MOD 0x99>;
+ resets = <&cpg 0x9d>;
+ power-domains = <&cpg>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c6: i2c@14401c00 {
+ compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
+ reg = <0 0x14401c00 0 0x400>;
+ interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 519 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 518 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tei", "ri", "ti", "spi", "sti",
+ "naki", "ali", "tmoi";
+ clocks = <&cpg CPG_MOD 0x9a>;
+ resets = <&cpg 0x9e>;
+ power-domains = <&cpg>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c7: i2c@14402000 {
+ compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
+ reg = <0 0x14402000 0 0x400>;
+ interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 521 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 520 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tei", "ri", "ti", "spi", "sti",
+ "naki", "ali", "tmoi";
+ clocks = <&cpg CPG_MOD 0x9b>;
+ resets = <&cpg 0x9f>;
+ power-domains = <&cpg>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c8: i2c@11c01000 {
+ compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
+ reg = <0 0x11c01000 0 0x400>;
+ interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 523 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 522 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tei", "ri", "ti", "spi", "sti",
+ "naki", "ali", "tmoi";
+ clocks = <&cpg CPG_MOD 0x93>;
+ resets = <&cpg 0xa0>;
+ power-domains = <&cpg>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
gic: interrupt-controller@14900000 {
compatible = "arm,gic-v3";
reg = <0x0 0x14900000 0 0x20000>,
--
2.43.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 1/3] dt-bindings: i2c: renesas,riic: Document the R9A09G047 support
2024-12-16 12:00 ` [PATCH 1/3] dt-bindings: i2c: renesas,riic: Document the R9A09G047 support Biju Das
@ 2024-12-16 16:18 ` Geert Uytterhoeven
2024-12-16 16:34 ` Geert Uytterhoeven
2024-12-16 18:36 ` Conor Dooley
2 siblings, 0 replies; 8+ messages in thread
From: Geert Uytterhoeven @ 2024-12-16 16:18 UTC (permalink / raw)
To: Biju Das
Cc: Andi Shyti, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chris Brandt, Magnus Damm, Wolfram Sang, linux-renesas-soc,
linux-i2c, devicetree, Prabhakar Mahadev Lad, Biju Das
On Mon, Dec 16, 2024 at 1:01 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Document support for the I2C Bus Interface (RIIC) found in the Renesas
> RZ/G3E (R9A09G047) SoC. This IP is compatible with Renesas RZ/V2H
> (R9A09G057) RIIC IP.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/3] dt-bindings: i2c: renesas,riic: Document the R9A09G047 support
2024-12-16 12:00 ` [PATCH 1/3] dt-bindings: i2c: renesas,riic: Document the R9A09G047 support Biju Das
2024-12-16 16:18 ` Geert Uytterhoeven
@ 2024-12-16 16:34 ` Geert Uytterhoeven
2024-12-16 20:23 ` Biju Das
2024-12-16 18:36 ` Conor Dooley
2 siblings, 1 reply; 8+ messages in thread
From: Geert Uytterhoeven @ 2024-12-16 16:34 UTC (permalink / raw)
To: Biju Das
Cc: Andi Shyti, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chris Brandt, Geert Uytterhoeven, Magnus Damm, Wolfram Sang,
linux-renesas-soc, linux-i2c, devicetree, Prabhakar Mahadev Lad,
Biju Das
Hi Biju,
On Mon, Dec 16, 2024 at 1:01 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Document support for the I2C Bus Interface (RIIC) found in the Renesas
> RZ/G3E (R9A09G047) SoC. This IP is compatible with Renesas RZ/V2H
> (R9A09G057) RIIC IP.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> --- a/Documentation/devicetree/bindings/i2c/renesas,riic.yaml
> +++ b/Documentation/devicetree/bindings/i2c/renesas,riic.yaml
> @@ -26,7 +26,9 @@ properties:
> - const: renesas,riic-rz # RZ/A or RZ/G2L
>
> - items:
> - - const: renesas,riic-r9a08g045 # RZ/G3S
> + - enum:
> + - renesas,riic-r9a08g045 # RZ/G3S
> + - renesas,riic-r9a09g047 # RZ/G3E
> - const: renesas,riic-r9a09g057 # RZ/V2H(P)
>
> - const: renesas,riic-r9a09g057 # RZ/V2H(P)
BTW, I think you want to make resets required for renesas,riic-r9a09g057, too.
Or perhaps make it required unless compatible with
renesas,riic-r7s72100 or renesas,riic-r7s9210.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 3/3] arm64: dts: renesas: r9a09g047: Add I2C nodes
2024-12-16 12:00 ` [PATCH 3/3] arm64: dts: renesas: r9a09g047: Add I2C nodes Biju Das
@ 2024-12-16 16:45 ` Geert Uytterhoeven
0 siblings, 0 replies; 8+ messages in thread
From: Geert Uytterhoeven @ 2024-12-16 16:45 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Magnus Damm,
linux-renesas-soc, devicetree, Prabhakar Mahadev Lad, Biju Das
On Mon, Dec 16, 2024 at 1:00 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Add I2C{0..8} nodes to RZ/G3E (R9A09G047) SoC DTSI.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.14.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/3] dt-bindings: i2c: renesas,riic: Document the R9A09G047 support
2024-12-16 12:00 ` [PATCH 1/3] dt-bindings: i2c: renesas,riic: Document the R9A09G047 support Biju Das
2024-12-16 16:18 ` Geert Uytterhoeven
2024-12-16 16:34 ` Geert Uytterhoeven
@ 2024-12-16 18:36 ` Conor Dooley
2 siblings, 0 replies; 8+ messages in thread
From: Conor Dooley @ 2024-12-16 18:36 UTC (permalink / raw)
To: Biju Das
Cc: Andi Shyti, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chris Brandt, Geert Uytterhoeven, Magnus Damm, Wolfram Sang,
linux-renesas-soc, linux-i2c, devicetree, Prabhakar Mahadev Lad,
Biju Das
[-- Attachment #1: Type: text/plain, Size: 341 bytes --]
On Mon, Dec 16, 2024 at 12:00:23PM +0000, Biju Das wrote:
> Document support for the I2C Bus Interface (RIIC) found in the Renesas
> RZ/G3E (R9A09G047) SoC. This IP is compatible with Renesas RZ/V2H
> (R9A09G057) RIIC IP.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* RE: [PATCH 1/3] dt-bindings: i2c: renesas,riic: Document the R9A09G047 support
2024-12-16 16:34 ` Geert Uytterhoeven
@ 2024-12-16 20:23 ` Biju Das
0 siblings, 0 replies; 8+ messages in thread
From: Biju Das @ 2024-12-16 20:23 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Andi Shyti, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chris Brandt, Geert Uytterhoeven, Magnus Damm, Wolfram Sang,
linux-renesas-soc@vger.kernel.org, linux-i2c@vger.kernel.org,
devicetree@vger.kernel.org, Prabhakar Mahadev Lad, biju.das.au
Hi Geert,
> -----Original Message-----
> From: Geert Uytterhoeven <geert@linux-m68k.org>
> Sent: 16 December 2024 16:34
> Subject: Re: [PATCH 1/3] dt-bindings: i2c: renesas,riic: Document the R9A09G047 support
>
> Hi Biju,
>
> On Mon, Dec 16, 2024 at 1:01 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > Document support for the I2C Bus Interface (RIIC) found in the Renesas
> > RZ/G3E (R9A09G047) SoC. This IP is compatible with Renesas RZ/V2H
> > (R9A09G057) RIIC IP.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
>
> > --- a/Documentation/devicetree/bindings/i2c/renesas,riic.yaml
> > +++ b/Documentation/devicetree/bindings/i2c/renesas,riic.yaml
> > @@ -26,7 +26,9 @@ properties:
> > - const: renesas,riic-rz # RZ/A or RZ/G2L
> >
> > - items:
> > - - const: renesas,riic-r9a08g045 # RZ/G3S
> > + - enum:
> > + - renesas,riic-r9a08g045 # RZ/G3S
> > + - renesas,riic-r9a09g047 # RZ/G3E
> > - const: renesas,riic-r9a09g057 # RZ/V2H(P)
> >
> > - const: renesas,riic-r9a09g057 # RZ/V2H(P)
>
> BTW, I think you want to make resets required for renesas,riic-r9a09g057, too.
> Or perhaps make it required unless compatible with
> renesas,riic-r7s72100 or renesas,riic-r7s9210.
Thanks for pointing out. I will make reset required property for
renesas,riic-r9a09g057 compatible devices.
Cheers,
Biju
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2024-12-16 20:23 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
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2024-12-16 12:00 [PATCH 0/3] Add RZ/G3E RIIC support Biju Das
2024-12-16 12:00 ` [PATCH 1/3] dt-bindings: i2c: renesas,riic: Document the R9A09G047 support Biju Das
2024-12-16 16:18 ` Geert Uytterhoeven
2024-12-16 16:34 ` Geert Uytterhoeven
2024-12-16 20:23 ` Biju Das
2024-12-16 18:36 ` Conor Dooley
2024-12-16 12:00 ` [PATCH 3/3] arm64: dts: renesas: r9a09g047: Add I2C nodes Biju Das
2024-12-16 16:45 ` Geert Uytterhoeven
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