* [PATCH] arm64: dts: socfpga: agilex5: add NAND board file
@ 2025-01-07 8:48 niravkumar.l.rabara
2025-01-07 8:48 ` niravkumar.l.rabara
0 siblings, 1 reply; 4+ messages in thread
From: niravkumar.l.rabara @ 2025-01-07 8:48 UTC (permalink / raw)
To: Dinh Nguyen, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
niravkumar.l.rabara, devicetree, linux-kernel
From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
The Agilex5 devkit supports a separate NAND daughter card.
The NAND daughter card replaces the SDMMC slot that is on the default
daughter card thus requires a separate board dts file.
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
---
arch/arm64/boot/dts/intel/Makefile | 1 +
.../dts/intel/socfpga_agilex5_socdk_nand.dts | 89 +++++++++++++++++++
2 files changed, 90 insertions(+)
create mode 100644 arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts
diff --git a/arch/arm64/boot/dts/intel/Makefile b/arch/arm64/boot/dts/intel/Makefile
index d39cfb723f5b..33f6d01266b1 100644
--- a/arch/arm64/boot/dts/intel/Makefile
+++ b/arch/arm64/boot/dts/intel/Makefile
@@ -3,5 +3,6 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex_n6000.dtb \
socfpga_agilex_socdk.dtb \
socfpga_agilex_socdk_nand.dtb \
socfpga_agilex5_socdk.dtb \
+ socfpga_agilex5_socdk_nand.dtb \
socfpga_n5x_socdk.dtb
dtb-$(CONFIG_ARCH_KEEMBAY) += keembay-evm.dtb
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts
new file mode 100644
index 000000000000..3eeae5c4e24a
--- /dev/null
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2025, Altera Corporation
+ */
+#include "socfpga_agilex5.dtsi"
+
+/ {
+ model = "SoCFPGA Agilex5 SoCDK";
+ compatible = "intel,socfpga-agilex5-socdk", "intel,socfpga-agilex5";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ led0 {
+ label = "hps_led0";
+ gpios = <&porta 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ led1 {
+ label = "hps_led1";
+ gpios = <&porta 7 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ /* We expect the bootloader to fill in the reg */
+ reg = <0x0 0x80000000 0x0 0x0>;
+ };
+};
+
+&gpio0 {
+ status = "okay";
+};
+
+&gpio1 {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+};
+
+&i3c0 {
+ status = "okay";
+};
+
+&i3c1 {
+ status = "okay";
+};
+
+&osc1 {
+ clock-frequency = <25000000>;
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&watchdog0 {
+ status = "okay";
+};
+
+&nand {
+ status = "okay";
+
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ nand-bus-width = <8>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0 0x200000>;
+ };
+ partition@200000 {
+ label = "root";
+ reg = <0x200000 0xffe00000>;
+ };
+ };
+};
--
2.25.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH] arm64: dts: socfpga: agilex5: add NAND board file
2025-01-07 8:48 [PATCH] arm64: dts: socfpga: agilex5: add NAND board file niravkumar.l.rabara
@ 2025-01-07 8:48 ` niravkumar.l.rabara
2025-01-07 9:02 ` Rabara, Niravkumar L
2025-01-07 14:58 ` kernel test robot
0 siblings, 2 replies; 4+ messages in thread
From: niravkumar.l.rabara @ 2025-01-07 8:48 UTC (permalink / raw)
To: Dinh Nguyen, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
niravkumar.l.rabara, devicetree, linux-kernel
From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
The Agilex5 devkit supports a separate NAND daughter card.
The NAND daughter card replaces the SDMMC slot that is on the default
daughter card thus requires a separate board dts file.
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
---
arch/arm64/boot/dts/intel/Makefile | 1 +
.../dts/intel/socfpga_agilex5_socdk_nand.dts | 89 +++++++++++++++++++
2 files changed, 90 insertions(+)
create mode 100644 arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts
diff --git a/arch/arm64/boot/dts/intel/Makefile b/arch/arm64/boot/dts/intel/Makefile
index d39cfb723f5b..33f6d01266b1 100644
--- a/arch/arm64/boot/dts/intel/Makefile
+++ b/arch/arm64/boot/dts/intel/Makefile
@@ -3,5 +3,6 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex_n6000.dtb \
socfpga_agilex_socdk.dtb \
socfpga_agilex_socdk_nand.dtb \
socfpga_agilex5_socdk.dtb \
+ socfpga_agilex5_socdk_nand.dtb \
socfpga_n5x_socdk.dtb
dtb-$(CONFIG_ARCH_KEEMBAY) += keembay-evm.dtb
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts
new file mode 100644
index 000000000000..3eeae5c4e24a
--- /dev/null
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2025, Altera Corporation
+ */
+#include "socfpga_agilex5.dtsi"
+
+/ {
+ model = "SoCFPGA Agilex5 SoCDK";
+ compatible = "intel,socfpga-agilex5-socdk", "intel,socfpga-agilex5";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ led0 {
+ label = "hps_led0";
+ gpios = <&porta 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ led1 {
+ label = "hps_led1";
+ gpios = <&porta 7 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ /* We expect the bootloader to fill in the reg */
+ reg = <0x0 0x80000000 0x0 0x0>;
+ };
+};
+
+&gpio0 {
+ status = "okay";
+};
+
+&gpio1 {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+};
+
+&i3c0 {
+ status = "okay";
+};
+
+&i3c1 {
+ status = "okay";
+};
+
+&osc1 {
+ clock-frequency = <25000000>;
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&watchdog0 {
+ status = "okay";
+};
+
+&nand {
+ status = "okay";
+
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ nand-bus-width = <8>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0 0x200000>;
+ };
+ partition@200000 {
+ label = "root";
+ reg = <0x200000 0xffe00000>;
+ };
+ };
+};
--
2.25.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* RE: [PATCH] arm64: dts: socfpga: agilex5: add NAND board file
2025-01-07 8:48 ` niravkumar.l.rabara
@ 2025-01-07 9:02 ` Rabara, Niravkumar L
2025-01-07 14:58 ` kernel test robot
1 sibling, 0 replies; 4+ messages in thread
From: Rabara, Niravkumar L @ 2025-01-07 9:02 UTC (permalink / raw)
To: Dinh Nguyen, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Please ignore this patch email - it is a duplicate. Sent by mistake.
> -----Original Message-----
> From: Rabara, Niravkumar L <niravkumar.l.rabara@intel.com>
> Sent: Tuesday, 7 January, 2025 4:49 PM
> To: Dinh Nguyen <dinguyen@kernel.org>; Rob Herring <robh@kernel.org>;
> Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor Dooley
> <conor+dt@kernel.org>; Rabara, Niravkumar L
> <niravkumar.l.rabara@intel.com>; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org
> Subject: [PATCH] arm64: dts: socfpga: agilex5: add NAND board file
>
> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>
> The Agilex5 devkit supports a separate NAND daughter card.
> The NAND daughter card replaces the SDMMC slot that is on the default
> daughter card thus requires a separate board dts file.
>
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> ---
> arch/arm64/boot/dts/intel/Makefile | 1 +
> .../dts/intel/socfpga_agilex5_socdk_nand.dts | 89 +++++++++++++++++++
> 2 files changed, 90 insertions(+)
> create mode 100644
> arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts
>
> diff --git a/arch/arm64/boot/dts/intel/Makefile
> b/arch/arm64/boot/dts/intel/Makefile
> index d39cfb723f5b..33f6d01266b1 100644
> --- a/arch/arm64/boot/dts/intel/Makefile
> +++ b/arch/arm64/boot/dts/intel/Makefile
> @@ -3,5 +3,6 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) +=
> socfpga_agilex_n6000.dtb \
> socfpga_agilex_socdk.dtb \
> socfpga_agilex_socdk_nand.dtb \
> socfpga_agilex5_socdk.dtb \
> + socfpga_agilex5_socdk_nand.dtb \
> socfpga_n5x_socdk.dtb
> dtb-$(CONFIG_ARCH_KEEMBAY) += keembay-evm.dtb diff --git
> a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts
> b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts
> new file mode 100644
> index 000000000000..3eeae5c4e24a
> --- /dev/null
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts
> @@ -0,0 +1,89 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2025, Altera Corporation */ #include
> +"socfpga_agilex5.dtsi"
> +
> +/ {
> + model = "SoCFPGA Agilex5 SoCDK";
> + compatible = "intel,socfpga-agilex5-socdk", "intel,socfpga-agilex5";
> +
> + aliases {
> + serial0 = &uart0;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> + led0 {
> + label = "hps_led0";
> + gpios = <&porta 6 GPIO_ACTIVE_HIGH>;
> + };
> +
> + led1 {
> + label = "hps_led1";
> + gpios = <&porta 7 GPIO_ACTIVE_HIGH>;
> + };
> + };
> +
> + memory@80000000 {
> + device_type = "memory";
> + /* We expect the bootloader to fill in the reg */
> + reg = <0x0 0x80000000 0x0 0x0>;
> + };
> +};
> +
> +&gpio0 {
> + status = "okay";
> +};
> +
> +&gpio1 {
> + status = "okay";
> +};
> +
> +&i2c0 {
> + status = "okay";
> +};
> +
> +&i3c0 {
> + status = "okay";
> +};
> +
> +&i3c1 {
> + status = "okay";
> +};
> +
> +&osc1 {
> + clock-frequency = <25000000>;
> +};
> +
> +&uart0 {
> + status = "okay";
> +};
> +
> +&watchdog0 {
> + status = "okay";
> +};
> +
> +&nand {
> + status = "okay";
> +
> + flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0>;
> + nand-bus-width = <8>;
> +
> + partition@0 {
> + label = "u-boot";
> + reg = <0 0x200000>;
> + };
> + partition@200000 {
> + label = "root";
> + reg = <0x200000 0xffe00000>;
> + };
> + };
> +};
> --
> 2.25.1
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] arm64: dts: socfpga: agilex5: add NAND board file
2025-01-07 8:48 ` niravkumar.l.rabara
2025-01-07 9:02 ` Rabara, Niravkumar L
@ 2025-01-07 14:58 ` kernel test robot
1 sibling, 0 replies; 4+ messages in thread
From: kernel test robot @ 2025-01-07 14:58 UTC (permalink / raw)
To: niravkumar.l.rabara, Dinh Nguyen, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, devicetree, linux-kernel
Cc: llvm, oe-kbuild-all
Hi,
kernel test robot noticed the following build errors:
[auto build test ERROR on robh/for-next]
[also build test ERROR on linus/master v6.13-rc6 next-20250107]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/niravkumar-l-rabara-intel-com/arm64-dts-socfpga-agilex5-add-NAND-board-file/20250107-165406
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
patch link: https://lore.kernel.org/r/20250107084831.2750035-2-niravkumar.l.rabara%40intel.com
patch subject: [PATCH] arm64: dts: socfpga: agilex5: add NAND board file
config: arm64-randconfig-002-20250107 (https://download.01.org/0day-ci/archive/20250107/202501072244.kNb1e8KP-lkp@intel.com/config)
compiler: clang version 20.0.0git (https://github.com/llvm/llvm-project 096551537b2a747a3387726ca618ceeb3950e9bc)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250107/202501072244.kNb1e8KP-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202501072244.kNb1e8KP-lkp@intel.com/
All errors (new ones prefixed by >>):
>> Error: arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts:39.1-7 Label or path gpio0 not found
FATAL ERROR: Syntax error parsing input tree
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 4+ messages in thread
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2025-01-07 8:48 [PATCH] arm64: dts: socfpga: agilex5: add NAND board file niravkumar.l.rabara
2025-01-07 8:48 ` niravkumar.l.rabara
2025-01-07 9:02 ` Rabara, Niravkumar L
2025-01-07 14:58 ` kernel test robot
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