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From: Andre Przywara <andre.przywara@arm.com>
To: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	Samuel Holland <samuel@sholland.org>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: [PATCH v4 06/14] clk: sunxi-ng: a523: Add support for bus clocks
Date: Fri,  7 Mar 2025 00:26:20 +0000	[thread overview]
Message-ID: <20250307002628.10684-7-andre.przywara@arm.com> (raw)
In-Reply-To: <20250307002628.10684-1-andre.przywara@arm.com>

Add the basic bus clocks for the Allwinner A523 and T527 SoCs.
This covers the AHB, APB0 and APB1 clocks. Linux is not supposed to
change those clocks, but they are needed as parents for many other mod
clocks.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
---
 drivers/clk/sunxi-ng/ccu-sun55i-a523.c | 39 ++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/drivers/clk/sunxi-ng/ccu-sun55i-a523.c b/drivers/clk/sunxi-ng/ccu-sun55i-a523.c
index 455bca0c344bc..c8a96b642bb1e 100644
--- a/drivers/clk/sunxi-ng/ccu-sun55i-a523.c
+++ b/drivers/clk/sunxi-ng/ccu-sun55i-a523.c
@@ -331,6 +331,39 @@ static CLK_FIXED_FACTOR_HW(pll_npu_2x_clk, "pll-npu-2x",
 static CLK_FIXED_FACTOR_HW(pll_npu_1x_clk, "pll-npu-1x",
 			   &pll_npu_4x_clk.common.hw, 4, 1, 0);
 
+
+/**************************************************************************
+ *                           bus clocks                                   *
+ **************************************************************************/
+
+static const struct clk_parent_data ahb_apb0_parents[] = {
+	{ .fw_name = "hosc" },
+	{ .fw_name = "losc" },
+	{ .fw_name = "iosc" },
+	{ .hw = &pll_periph0_600M_clk.hw },
+};
+
+static SUNXI_CCU_M_DATA_WITH_MUX(ahb_clk, "ahb", ahb_apb0_parents, 0x510,
+				 0, 5,		/* M */
+				 24, 2,		/* mux */
+				 0);
+static SUNXI_CCU_M_DATA_WITH_MUX(apb0_clk, "apb0", ahb_apb0_parents, 0x520,
+				 0, 5,		/* M */
+				 24, 2,	/* mux */
+				 0);
+
+static const struct clk_parent_data apb1_parents[] = {
+	{ .fw_name = "hosc" },
+	{ .fw_name = "losc" },
+	{ .fw_name = "iosc" },
+	{ .hw = &pll_periph0_600M_clk.hw },
+	{ .hw = &pll_periph0_480M_clk.common.hw },
+};
+static SUNXI_CCU_M_DATA_WITH_MUX(apb1_clk, "apb1", apb1_parents, 0x524,
+				 0, 5,		/* M */
+				 24, 3,		/* mux */
+				 0);
+
 /*
  * Contains all clocks that are controlled by a hardware register. They
  * have a (sunxi) .common member, which needs to be initialised by the common
@@ -358,6 +391,9 @@ static struct ccu_common *sun55i_a523_ccu_clks[] = {
 	&pll_ve_clk.common,
 	&pll_audio0_4x_clk.common,
 	&pll_npu_4x_clk.common,
+	&ahb_clk.common,
+	&apb0_clk.common,
+	&apb1_clk.common,
 };
 
 static struct clk_hw_onecell_data sun55i_a523_hw_clks = {
@@ -403,6 +439,9 @@ static struct clk_hw_onecell_data sun55i_a523_hw_clks = {
 		[CLK_PLL_NPU_4X]	= &pll_npu_4x_clk.common.hw,
 		[CLK_PLL_NPU_2X]	= &pll_npu_2x_clk.hw,
 		[CLK_PLL_NPU]		= &pll_npu_1x_clk.hw,
+		[CLK_AHB]		= &ahb_clk.common.hw,
+		[CLK_APB0]		= &apb0_clk.common.hw,
+		[CLK_APB1]		= &apb1_clk.common.hw,
 	},
 };
 
-- 
2.46.3


  parent reply	other threads:[~2025-03-07  0:26 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-07  0:26 [PATCH v4 00/14] clk: sunxi-ng: add A523 clock support Andre Przywara
2025-03-07  0:26 ` [PATCH v4 01/14] clk: sunxi-ng: mp: introduce dual-divider clock Andre Przywara
2025-03-07  0:26 ` [PATCH v4 02/14] clk: sunxi-ng: mp: provide wrappers for setting feature flags Andre Przywara
2025-03-09  6:38   ` Jernej Škrabec
2025-03-07  0:26 ` [PATCH v4 03/14] clk: sunxi-ng: Add support for update bit Andre Przywara
2025-03-07  0:26 ` [PATCH v4 04/14] dt-bindings: clk: sunxi-ng: document two Allwinner A523 CCUs Andre Przywara
2025-03-11 17:21   ` Rob Herring (Arm)
2025-03-07  0:26 ` [PATCH v4 05/14] clk: sunxi-ng: Add support for the A523/T527 CCU PLLs Andre Przywara
2025-03-09  6:43   ` Jernej Škrabec
2025-03-07  0:26 ` Andre Przywara [this message]
2025-03-07  0:26 ` [PATCH v4 07/14] clk: sunxi-ng: a523: add video mod clocks Andre Przywara
2025-03-09  6:49   ` Jernej Škrabec
2025-03-07  0:26 ` [PATCH v4 08/14] clk: sunxi-ng: a523: add system " Andre Przywara
2025-03-09  6:50   ` Jernej Škrabec
2025-03-07  0:26 ` [PATCH v4 09/14] clk: sunxi-ng: a523: add interface " Andre Przywara
2025-03-09  6:53   ` Jernej Škrabec
2025-03-07  0:26 ` [PATCH v4 10/14] clk: sunxi-ng: a523: add USB " Andre Przywara
2025-03-07  0:26 ` [PATCH v4 11/14] clk: sunxi-ng: a523: remaining " Andre Przywara
2025-03-09  6:54   ` Jernej Škrabec
2025-03-07  0:26 ` [PATCH v4 12/14] clk: sunxi-ng: a523: add bus clock gates Andre Przywara
2025-03-09  6:57   ` Jernej Škrabec
2025-03-07  0:26 ` [PATCH v4 13/14] clk: sunxi-ng: a523: add reset lines Andre Przywara
2025-03-09  7:00   ` Jernej Škrabec
2025-03-07  0:26 ` [PATCH v4 14/14] clk: sunxi-ng: add support for the A523/T527 PRCM CCU Andre Przywara
2025-03-09  7:03   ` Jernej Škrabec
2025-03-11 18:24 ` [PATCH v4 00/14] clk: sunxi-ng: add A523 clock support Chen-Yu Tsai
2025-03-12  4:03 ` Chen-Yu Tsai

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