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* [PATCH] PCI: xilinx-cpm: Add cpm5_csr register mapping for CPM5_HOST1 variant
@ 2025-03-17 12:41 Thippeswamy Havalige
  2025-03-23 12:48 ` Krzysztof Wilczyński
  2025-03-23 12:51 ` Krzysztof Wilczyński
  0 siblings, 2 replies; 4+ messages in thread
From: Thippeswamy Havalige @ 2025-03-17 12:41 UTC (permalink / raw)
  To: bhelgaas, lpieralisi, kw, manivannan.sadhasivam, robh, krzk+dt,
	conor+dt
  Cc: linux-pci, devicetree, linux-kernel, michal.simek,
	bharat.kumar.gogada, Thippeswamy Havalige

This commit updates the CPM5 variant check to include CPM5_HOST1.
Previously, only CPM5 was considered when mapping the "cpm_csr" register.

With this change, CPM5_HOST1 is also supported, ensuring proper resource
mapping for this variant.

Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
---
 drivers/pci/controller/pcie-xilinx-cpm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/controller/pcie-xilinx-cpm.c b/drivers/pci/controller/pcie-xilinx-cpm.c
index d0ab187..13ca493 100644
--- a/drivers/pci/controller/pcie-xilinx-cpm.c
+++ b/drivers/pci/controller/pcie-xilinx-cpm.c
@@ -542,7 +542,8 @@ static int xilinx_cpm_pcie_parse_dt(struct xilinx_cpm_pcie *port,
 	if (IS_ERR(port->cfg))
 		return PTR_ERR(port->cfg);
 
-	if (port->variant->version == CPM5) {
+	if (port->variant->version == CPM5 ||
+	    port->variant->version == CPM5_HOST1) {
 		port->reg_base = devm_platform_ioremap_resource_byname(pdev,
 								    "cpm_csr");
 		if (IS_ERR(port->reg_base))
-- 
1.8.3.1


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end of thread, other threads:[~2025-03-24  4:39 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2025-03-17 12:41 [PATCH] PCI: xilinx-cpm: Add cpm5_csr register mapping for CPM5_HOST1 variant Thippeswamy Havalige
2025-03-23 12:48 ` Krzysztof Wilczyński
2025-03-23 12:51 ` Krzysztof Wilczyński
2025-03-24  4:39   ` Havalige, Thippeswamy

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