From: Valentina Fernandez <valentina.fernandezalanis@microchip.com>
To: <conor.dooley@microchip.com>, <daire.mcnamara@microchip.com>,
<paul.walmsley@sifive.com>, <palmer@dabbelt.com>,
<robh@kernel.org>, <krzk+dt@kernel.org>, <aou@eecs.berkeley.edu>,
<alex@ghiti.fr>, <valentina.fernandezalanis@microchip.com>
Cc: <linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
<devicetree@vger.kernel.org>
Subject: [PATCH v3 3/6] riscv: dts: microchip: add icicle kit with production device
Date: Mon, 8 Sep 2025 12:57:29 +0100 [thread overview]
Message-ID: <20250908115732.31092-4-valentina.fernandezalanis@microchip.com> (raw)
In-Reply-To: <20250908115732.31092-1-valentina.fernandezalanis@microchip.com>
With the introduction of the Icicle Kit using the production MPFS250T
device, it's necessary to distinguish it from the engineering sample
(-es) variant. Engineering samples cannot write to flash from the MSS,
as noted in the PolarFire SoC FPGA ES errata.
Add a new device tree (mpfs-icicle-kit-prod.dts) for the production
board which includes the icicle kit common dtsi and enable the system
controller SPI flash, which is only accessible on production silicon.
Remove redundant board compatible from fabric dtsi and update board
compatibles for v2025.07 release, which includes Mi-V IHC v2 for AMP
cluster communication.
Signed-off-by: Valentina Fernandez <valentina.fernandezalanis@microchip.com>
---
arch/riscv/boot/dts/microchip/Makefile | 1 +
.../dts/microchip/mpfs-icicle-kit-common.dtsi | 4 ++++
.../dts/microchip/mpfs-icicle-kit-fabric.dtsi | 23 ++++++++++++++++---
.../dts/microchip/mpfs-icicle-kit-prod.dts | 23 +++++++++++++++++++
.../boot/dts/microchip/mpfs-icicle-kit.dts | 3 ++-
5 files changed, 50 insertions(+), 4 deletions(-)
create mode 100644 arch/riscv/boot/dts/microchip/mpfs-icicle-kit-prod.dts
diff --git a/arch/riscv/boot/dts/microchip/Makefile b/arch/riscv/boot/dts/microchip/Makefile
index f51aeeb9fd3b..1e2f4e41bf0d 100644
--- a/arch/riscv/boot/dts/microchip/Makefile
+++ b/arch/riscv/boot/dts/microchip/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-beaglev-fire.dtb
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-icicle-kit.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-icicle-kit-prod.dtb
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp.dtb
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-sev-kit.dtb
diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-common.dtsi b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-common.dtsi
index eafea3b69cd7..5c7a8ffad85b 100644
--- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-common.dtsi
+++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-common.dtsi
@@ -134,6 +134,10 @@ &i2c2 {
status = "okay";
};
+&ihc {
+ status = "okay";
+};
+
&mac0 {
phy-mode = "sgmii";
phy-handle = <&phy0>;
diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi
index a6dda55a2d1d..e673b676fd1a 100644
--- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi
+++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi
@@ -2,9 +2,6 @@
/* Copyright (c) 2020-2021 Microchip Technology Inc */
/ {
- compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs-icicle-kit",
- "microchip,mpfs";
-
core_pwm0: pwm@40000000 {
compatible = "microchip,corepwm-rtl-v4";
reg = <0x0 0x40000000 0x0 0xF0>;
@@ -26,6 +23,26 @@ i2c2: i2c@40000200 {
status = "disabled";
};
+ ihc: mailbox {
+ compatible = "microchip,sbi-ipc";
+ interrupt-parent = <&plic>;
+ interrupts = <180>, <179>, <178>, <177>;
+ interrupt-names = "hart-1", "hart-2", "hart-3", "hart-4";
+ #mbox-cells = <1>;
+ status = "disabled";
+ };
+
+ mailbox@50000000 {
+ compatible = "microchip,miv-ihc-rtl-v2";
+ reg = <0x0 0x50000000 0x0 0x1c000>;
+ interrupt-parent = <&plic>;
+ interrupts = <180>, <179>, <178>, <177>;
+ interrupt-names = "hart-1", "hart-2", "hart-3", "hart-4";
+ #mbox-cells = <1>;
+ microchip,ihc-chan-disabled-mask = /bits/ 16 <0>;
+ status = "disabled";
+ };
+
pcie: pcie@3000000000 {
compatible = "microchip,pcie-host-1.0";
#address-cells = <0x3>;
diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-prod.dts b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-prod.dts
new file mode 100644
index 000000000000..8afedece89d1
--- /dev/null
+++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-prod.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/* Copyright (c) 2025 Microchip Technology Inc */
+
+/dts-v1/;
+
+#include "mpfs-icicle-kit-common.dtsi"
+
+/ {
+ model = "Microchip PolarFire-SoC Icicle Kit (Production Silicon)";
+ compatible = "microchip,mpfs-icicle-prod-reference-rtl-v2507",
+ "microchip,mpfs-icicle-kit-prod",
+ "microchip,mpfs-icicle-kit",
+ "microchip,mpfs-prod",
+ "microchip,mpfs";
+};
+
+&syscontroller {
+ microchip,bitstream-flash = <&sys_ctrl_flash>;
+};
+
+&syscontroller_qspi {
+ status = "okay";
+};
diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts
index 2cb08ed0946d..556aa9638282 100644
--- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts
+++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts
@@ -7,6 +7,7 @@
/ {
model = "Microchip PolarFire-SoC Icicle Kit";
- compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs-icicle-kit",
+ compatible = "microchip,mpfs-icicle-es-reference-rtl-v2507",
+ "microchip,mpfs-icicle-kit",
"microchip,mpfs";
};
--
2.34.1
next prev parent reply other threads:[~2025-09-08 11:48 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-08 11:57 [PATCH v3 0/6] Icicle Kit with prod device and Discovery Kit support Valentina Fernandez
2025-09-08 11:57 ` [PATCH v3 1/6] riscv: dts: microchip: add common board dtsi for icicle kit variants Valentina Fernandez
2025-09-08 11:57 ` [PATCH v3 2/6] dt-bindings: riscv: microchip: document icicle kit with production device Valentina Fernandez
2025-09-09 6:53 ` Krzysztof Kozlowski
2025-09-09 8:35 ` Conor Dooley
2025-09-08 11:57 ` Valentina Fernandez [this message]
2025-09-08 11:57 ` [PATCH v3 4/6] riscv: dts: microchip: rename icicle kit ccc clock and other minor fixes Valentina Fernandez
2025-09-08 11:57 ` [PATCH v3 5/6] dt-bindings: riscv: microchip: document Discovery Kit Valentina Fernandez
2025-09-08 11:57 ` [PATCH v3 6/6] riscv: dts: microchip: add a device tree for " Valentina Fernandez
2025-09-10 17:55 ` [PATCH v3 0/6] Icicle Kit with prod device and Discovery Kit support Conor Dooley
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250908115732.31092-4-valentina.fernandezalanis@microchip.com \
--to=valentina.fernandezalanis@microchip.com \
--cc=alex@ghiti.fr \
--cc=aou@eecs.berkeley.edu \
--cc=conor.dooley@microchip.com \
--cc=daire.mcnamara@microchip.com \
--cc=devicetree@vger.kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox