* [PATCH v4] riscv: dts: spacemit: add UART pinctrl combinations
@ 2025-09-17 6:59 Hendrik Hamerlinck
2025-09-17 7:46 ` Troy Mitchell
2025-10-13 23:59 ` Yixun Lan
0 siblings, 2 replies; 7+ messages in thread
From: Hendrik Hamerlinck @ 2025-09-17 6:59 UTC (permalink / raw)
To: dlan, robh, krzk+dt, conor+dt, paul.walmsley, palmer, aou, alex
Cc: skhan, linux-kernel-mentees, devicetree, linux-riscv, spacemit,
linux-kernel, Hendrik Hamerlinck
Add UART pinctrl configurations based on the SoC datasheet and the
downstream Bianbu Linux tree. The drive strength values were taken from
the downstream implementation, which uses medium drive strength.
CTS/RTS are moved to separate *-cts-rts-cfg states so boards can enable
hardware flow control conditionally.
Signed-off-by: Hendrik Hamerlinck <hendrik.hamerlinck@hammernet.be>
Reviewed-by: Yixun Lan <dlan@gentoo.org>
---
Changes in v4:
- Explicitly use 0 as bias-pull-up value
Changes in v3:
- Added /omit-if-no-ref/ to pinctrl states to reduce DT size
Changes in v2:
- Split cts/rts into separate pinctrl configs as suggested
- Removed options from board DTS files to keep them cleaner
---
arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 430 ++++++++++++++++++-
1 file changed, 428 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
index 381055737422..44e78764f491 100644
--- a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
@@ -11,11 +11,437 @@
#define K1_GPIO(x) (x / 32) (x % 32)
&pinctrl {
+ /omit-if-no-ref/
+ uart0_0_cfg: uart0-0-cfg {
+ uart0-0-pins {
+ pinmux = <K1_PADCONF(104, 3)>, /* uart0_txd */
+ <K1_PADCONF(105, 3)>; /* uart0_rxd */
+ power-source = <3300>;
+ bias-pull-up = <0>;
+ drive-strength = <19>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart0_1_cfg: uart0-1-cfg {
+ uart0-1-pins {
+ pinmux = <K1_PADCONF(108, 1)>, /* uart0_txd */
+ <K1_PADCONF(80, 3)>; /* uart0_rxd */
+ power-source = <3300>;
+ bias-pull-up = <0>;
+ drive-strength = <19>;
+ };
+ };
+
+ /omit-if-no-ref/
uart0_2_cfg: uart0-2-cfg {
uart0-2-pins {
- pinmux = <K1_PADCONF(68, 2)>,
- <K1_PADCONF(69, 2)>;
+ pinmux = <K1_PADCONF(68, 2)>, /* uart0_txd */
+ <K1_PADCONF(69, 2)>; /* uart0_rxd */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart2_0_cfg: uart2-0-cfg {
+ uart2-0-pins {
+ pinmux = <K1_PADCONF(21, 1)>, /* uart2_txd */
+ <K1_PADCONF(22, 1)>; /* uart2_rxd */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart2_0_cts_rts_cfg: uart2-0-cts-rts-cfg {
+ uart2-0-pins {
+ pinmux = <K1_PADCONF(23, 1)>, /* uart2_cts */
+ <K1_PADCONF(24, 1)>; /* uart2_rts */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart3_0_cfg: uart3-0-cfg {
+ uart3-0-pins {
+ pinmux = <K1_PADCONF(81, 2)>, /* uart3_txd */
+ <K1_PADCONF(82, 2)>; /* uart3_rxd */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart3_0_cts_rts_cfg: uart3-0-cts-rts-cfg {
+ uart3-0-pins {
+ pinmux = <K1_PADCONF(83, 2)>, /* uart3_cts */
+ <K1_PADCONF(84, 2)>; /* uart3_rts */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart3_1_cfg: uart3-1-cfg {
+ uart3-1-pins {
+ pinmux = <K1_PADCONF(18, 2)>, /* uart3_txd */
+ <K1_PADCONF(19, 2)>; /* uart3_rxd */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart3_1_cts_rts_cfg: uart3-1-cts-rts-cfg {
+ uart3-1-pins {
+ pinmux = <K1_PADCONF(20, 2)>, /* uart3_cts */
+ <K1_PADCONF(21, 2)>; /* uart3_rts */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart3_2_cfg: uart3-2-cfg {
+ uart3-2-pins {
+ pinmux = <K1_PADCONF(53, 4)>, /* uart3_txd */
+ <K1_PADCONF(54, 4)>; /* uart3_rxd */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart3_2_cts_rts_cfg: uart3-2-cts-rts-cfg {
+ uart3-2-pins {
+ pinmux = <K1_PADCONF(55, 4)>, /* uart3_cts */
+ <K1_PADCONF(56, 4)>; /* uart3_rts */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart4_0_cfg: uart4-0-cfg {
+ uart4-0-pins {
+ pinmux = <K1_PADCONF(100, 4)>, /* uart4_txd */
+ <K1_PADCONF(101, 4)>; /* uart4_rxd */
+ power-source = <3300>;
+ bias-pull-up = <0>;
+ drive-strength = <19>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart4_1_cfg: uart4-1-cfg {
+ uart4-1-pins {
+ pinmux = <K1_PADCONF(83, 3)>, /* uart4_txd */
+ <K1_PADCONF(84, 3)>; /* uart4_rxd */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart4_1_cts_rts_cfg: uart4-1-cts-rts-cfg {
+ uart4-1-pins {
+ pinmux = <K1_PADCONF(81, 3)>, /* uart4_cts */
+ <K1_PADCONF(82, 3)>; /* uart4_rts */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart4_2_cfg: uart4-2-cfg {
+ uart4-2-pins {
+ pinmux = <K1_PADCONF(23, 2)>, /* uart4_txd */
+ <K1_PADCONF(24, 2)>; /* uart4_rxd */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart4_3_cfg: uart4-3-cfg {
+ uart4-3-pins {
+ pinmux = <K1_PADCONF(33, 2)>, /* uart4_txd */
+ <K1_PADCONF(34, 2)>; /* uart4_rxd */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart4_3_cts_rts_cfg: uart4-3-cts-rts-cfg {
+ uart4-3-pins {
+ pinmux = <K1_PADCONF(35, 2)>, /* uart4_cts */
+ <K1_PADCONF(36, 2)>; /* uart4_rts */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart4_4_cfg: uart4-4-cfg {
+ uart4-4-pins {
+ pinmux = <K1_PADCONF(111, 4)>, /* uart4_txd */
+ <K1_PADCONF(112, 4)>; /* uart4_rxd */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart4_4_cts_rts_cfg: uart4-4-cts-rts-cfg {
+ uart4-4-pins {
+ pinmux = <K1_PADCONF(113, 4)>, /* uart4_cts */
+ <K1_PADCONF(114, 4)>; /* uart4_rts */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart5_0_cfg: uart5-0-cfg {
+ uart5-0-pins {
+ pinmux = <K1_PADCONF(102, 3)>, /* uart5_txd */
+ <K1_PADCONF(103, 3)>; /* uart5_rxd */
+ power-source = <3300>;
+ bias-pull-up = <0>;
+ drive-strength = <19>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart5_1_cfg: uart5-1-cfg {
+ uart5-1-pins {
+ pinmux = <K1_PADCONF(25, 2)>, /* uart5_txd */
+ <K1_PADCONF(26, 2)>; /* uart5_rxd */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart5_1_cts_rts_cfg: uart5-1-cts-rts-cfg {
+ uart5-1-pins {
+ pinmux = <K1_PADCONF(27, 2)>, /* uart5_cts */
+ <K1_PADCONF(28, 2)>; /* uart5_rts */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart5_2_cfg: uart5-2-cfg {
+ uart5-2-pins {
+ pinmux = <K1_PADCONF(42, 2)>, /* uart5_txd */
+ <K1_PADCONF(43, 2)>; /* uart5_rxd */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart5_2_cts_rts_cfg: uart5-2-cts-rts-cfg {
+ uart5-2-pins {
+ pinmux = <K1_PADCONF(44, 2)>, /* uart5_cts */
+ <K1_PADCONF(45, 2)>; /* uart5_rts */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart5_3_cfg: uart5-3-cfg {
+ uart5-3-pins {
+ pinmux = <K1_PADCONF(70, 4)>, /* uart5_txd */
+ <K1_PADCONF(71, 4)>; /* uart5_rxd */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart5_3_cts_rts_cfg: uart5-3-cts-rts-cfg {
+ uart5-3-pins {
+ pinmux = <K1_PADCONF(72, 4)>, /* uart5_cts */
+ <K1_PADCONF(73, 4)>; /* uart5_rts */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart6_0_cfg: uart6-0-cfg {
+ uart6-0-pins {
+ pinmux = <K1_PADCONF(86, 2)>, /* uart6_txd */
+ <K1_PADCONF(87, 2)>; /* uart6_rxd */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart6_0_cts_rts_cfg: uart6-0-cts-rts-cfg {
+ uart6-0-pins {
+ pinmux = <K1_PADCONF(85, 2)>, /* uart6_cts */
+ <K1_PADCONF(90, 2)>; /* uart6_rts */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart6_1_cfg: uart6-1-cfg {
+ uart6-1-pins {
+ pinmux = <K1_PADCONF(0, 2)>, /* uart6_txd */
+ <K1_PADCONF(1, 2)>; /* uart6_rxd */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart6_1_cts_rts_cfg: uart6-1-cts-rts-cfg {
+ uart6-1-pins {
+ pinmux = <K1_PADCONF(2, 2)>, /* uart6_cts */
+ <K1_PADCONF(3, 2)>; /* uart6_rts */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart6_2_cfg: uart6-2-cfg {
+ uart6-2-pins {
+ pinmux = <K1_PADCONF(56, 2)>, /* uart6_txd */
+ <K1_PADCONF(57, 2)>; /* uart6_rxd */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart7_0_cfg: uart7-0-cfg {
+ uart7-0-pins {
+ pinmux = <K1_PADCONF(88, 2)>, /* uart7_txd */
+ <K1_PADCONF(89, 2)>; /* uart7_rxd */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart7_1_cfg: uart7-1-cfg {
+ uart7-1-pins {
+ pinmux = <K1_PADCONF(4, 2)>, /* uart7_txd */
+ <K1_PADCONF(5, 2)>; /* uart7_rxd */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart7_1_cts_rts_cfg: uart7-1-cts-rts-cfg {
+ uart7-1-pins {
+ pinmux = <K1_PADCONF(6, 2)>, /* uart7_cts */
+ <K1_PADCONF(7, 2)>; /* uart7_rts */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart8_0_cfg: uart8-0-cfg {
+ uart8-0-pins {
+ pinmux = <K1_PADCONF(82, 4)>, /* uart8_txd */
+ <K1_PADCONF(83, 4)>; /* uart8_rxd */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart8_1_cfg: uart8-1-cfg {
+ uart8-1-pins {
+ pinmux = <K1_PADCONF(8, 2)>, /* uart8_txd */
+ <K1_PADCONF(9, 2)>; /* uart8_rxd */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart8_1_cts_rts_cfg: uart8-1-cts-rts-cfg {
+ uart8-1-pins {
+ pinmux = <K1_PADCONF(10, 2)>, /* uart8_cts */
+ <K1_PADCONF(11, 2)>; /* uart8_rts */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart8_2_cfg: uart8-2-cfg {
+ uart8-2-pins {
+ pinmux = <K1_PADCONF(75, 4)>, /* uart8_txd */
+ <K1_PADCONF(76, 4)>; /* uart8_rxd */
+ power-source = <3300>;
+ bias-pull-up = <0>;
+ drive-strength = <19>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart8_2_cts_rts_cfg: uart8-2-cts-rts-cfg {
+ uart8-2-pins {
+ pinmux = <K1_PADCONF(77, 4)>, /* uart8_cts */
+ <K1_PADCONF(78, 4)>; /* uart8_rts */
+ power-source = <3300>;
+ bias-pull-up = <0>;
+ drive-strength = <19>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart9_0_cfg: uart9-0-cfg {
+ uart9-0-pins {
+ pinmux = <K1_PADCONF(12, 2)>, /* uart9_txd */
+ <K1_PADCONF(13, 2)>; /* uart9_rxd */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart9_1_cfg: uart9-1-cfg {
+ uart9-1-pins {
+ pinmux = <K1_PADCONF(116, 3)>, /* uart9_txd */
+ <K1_PADCONF(117, 3)>; /* uart9_rxd */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart9_1_cts_rts_cfg: uart9-1-cts-rts-cfg {
+ uart9-1-pins {
+ pinmux = <K1_PADCONF(110, 3)>, /* uart9_cts */
+ <K1_PADCONF(115, 3)>; /* uart9_rts */
+ bias-pull-up = <0>;
+ drive-strength = <32>;
+ };
+ };
+ /omit-if-no-ref/
+ uart9_2_cfg: uart9-2-cfg {
+ uart9-2-pins {
+ pinmux = <K1_PADCONF(72, 2)>, /* uart9_txd */
+ <K1_PADCONF(73, 2)>; /* uart9_rxd */
bias-pull-up = <0>;
drive-strength = <32>;
};
--
2.43.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v4] riscv: dts: spacemit: add UART pinctrl combinations
2025-09-17 6:59 [PATCH v4] riscv: dts: spacemit: add UART pinctrl combinations Hendrik Hamerlinck
@ 2025-09-17 7:46 ` Troy Mitchell
2025-09-17 8:17 ` Hendrik Hamerlinck
2025-10-13 23:59 ` Yixun Lan
1 sibling, 1 reply; 7+ messages in thread
From: Troy Mitchell @ 2025-09-17 7:46 UTC (permalink / raw)
To: Hendrik Hamerlinck, dlan, robh, krzk+dt, conor+dt, paul.walmsley,
palmer, aou, alex
Cc: skhan, linux-kernel-mentees, devicetree, linux-riscv, spacemit,
linux-kernel, Troy Mitchell
Hi Hendrik, Thanks for your patch!
On Wed, Sep 17, 2025 at 08:59:07AM +0200, Hendrik Hamerlinck wrote:
> Add UART pinctrl configurations based on the SoC datasheet and the
> downstream Bianbu Linux tree. The drive strength values were taken from
> the downstream implementation, which uses medium drive strength.
> CTS/RTS are moved to separate *-cts-rts-cfg states so boards can enable
> hardware flow control conditionally.
>
> Signed-off-by: Hendrik Hamerlinck <hendrik.hamerlinck@hammernet.be>
> Reviewed-by: Yixun Lan <dlan@gentoo.org>
> ---
> Changes in v4:
> - Explicitly use 0 as bias-pull-up value
>
> Changes in v3:
> - Added /omit-if-no-ref/ to pinctrl states to reduce DT size
>
> Changes in v2:
> - Split cts/rts into separate pinctrl configs as suggested
> - Removed options from board DTS files to keep them cleaner
> ---
> arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 430 ++++++++++++++++++-
> 1 file changed, 428 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> + /omit-if-no-ref/
> + uart2_0_cts_rts_cfg: uart2-0-cts-rts-cfg {
> + uart2-0-pins {
> + pinmux = <K1_PADCONF(23, 1)>, /* uart2_cts */
> + <K1_PADCONF(24, 1)>; /* uart2_rts */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
We are currently using the 8250 UART driver, but hardware flow control does not
work properly on K1. We are considering fixing this when time permits.
Should we add a comment here to avoid confusing others who may run into this?
If so, I will remove the comment once the issue has been fixed.
Anyway,
Reviewed-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
> +
> + /omit-if-no-ref/
> + uart3_0_cfg: uart3-0-cfg {
> + uart3-0-pins {
> + pinmux = <K1_PADCONF(81, 2)>, /* uart3_txd */
> + <K1_PADCONF(82, 2)>; /* uart3_rxd */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart3_0_cts_rts_cfg: uart3-0-cts-rts-cfg {
> + uart3-0-pins {
> + pinmux = <K1_PADCONF(83, 2)>, /* uart3_cts */
> + <K1_PADCONF(84, 2)>; /* uart3_rts */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart3_1_cfg: uart3-1-cfg {
> + uart3-1-pins {
> + pinmux = <K1_PADCONF(18, 2)>, /* uart3_txd */
> + <K1_PADCONF(19, 2)>; /* uart3_rxd */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart3_1_cts_rts_cfg: uart3-1-cts-rts-cfg {
> + uart3-1-pins {
> + pinmux = <K1_PADCONF(20, 2)>, /* uart3_cts */
> + <K1_PADCONF(21, 2)>; /* uart3_rts */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart3_2_cfg: uart3-2-cfg {
> + uart3-2-pins {
> + pinmux = <K1_PADCONF(53, 4)>, /* uart3_txd */
> + <K1_PADCONF(54, 4)>; /* uart3_rxd */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart3_2_cts_rts_cfg: uart3-2-cts-rts-cfg {
> + uart3-2-pins {
> + pinmux = <K1_PADCONF(55, 4)>, /* uart3_cts */
> + <K1_PADCONF(56, 4)>; /* uart3_rts */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart4_0_cfg: uart4-0-cfg {
> + uart4-0-pins {
> + pinmux = <K1_PADCONF(100, 4)>, /* uart4_txd */
> + <K1_PADCONF(101, 4)>; /* uart4_rxd */
> + power-source = <3300>;
> + bias-pull-up = <0>;
> + drive-strength = <19>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart4_1_cfg: uart4-1-cfg {
> + uart4-1-pins {
> + pinmux = <K1_PADCONF(83, 3)>, /* uart4_txd */
> + <K1_PADCONF(84, 3)>; /* uart4_rxd */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart4_1_cts_rts_cfg: uart4-1-cts-rts-cfg {
> + uart4-1-pins {
> + pinmux = <K1_PADCONF(81, 3)>, /* uart4_cts */
> + <K1_PADCONF(82, 3)>; /* uart4_rts */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart4_2_cfg: uart4-2-cfg {
> + uart4-2-pins {
> + pinmux = <K1_PADCONF(23, 2)>, /* uart4_txd */
> + <K1_PADCONF(24, 2)>; /* uart4_rxd */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart4_3_cfg: uart4-3-cfg {
> + uart4-3-pins {
> + pinmux = <K1_PADCONF(33, 2)>, /* uart4_txd */
> + <K1_PADCONF(34, 2)>; /* uart4_rxd */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart4_3_cts_rts_cfg: uart4-3-cts-rts-cfg {
> + uart4-3-pins {
> + pinmux = <K1_PADCONF(35, 2)>, /* uart4_cts */
> + <K1_PADCONF(36, 2)>; /* uart4_rts */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart4_4_cfg: uart4-4-cfg {
> + uart4-4-pins {
> + pinmux = <K1_PADCONF(111, 4)>, /* uart4_txd */
> + <K1_PADCONF(112, 4)>; /* uart4_rxd */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart4_4_cts_rts_cfg: uart4-4-cts-rts-cfg {
> + uart4-4-pins {
> + pinmux = <K1_PADCONF(113, 4)>, /* uart4_cts */
> + <K1_PADCONF(114, 4)>; /* uart4_rts */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart5_0_cfg: uart5-0-cfg {
> + uart5-0-pins {
> + pinmux = <K1_PADCONF(102, 3)>, /* uart5_txd */
> + <K1_PADCONF(103, 3)>; /* uart5_rxd */
> + power-source = <3300>;
> + bias-pull-up = <0>;
> + drive-strength = <19>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart5_1_cfg: uart5-1-cfg {
> + uart5-1-pins {
> + pinmux = <K1_PADCONF(25, 2)>, /* uart5_txd */
> + <K1_PADCONF(26, 2)>; /* uart5_rxd */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart5_1_cts_rts_cfg: uart5-1-cts-rts-cfg {
> + uart5-1-pins {
> + pinmux = <K1_PADCONF(27, 2)>, /* uart5_cts */
> + <K1_PADCONF(28, 2)>; /* uart5_rts */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart5_2_cfg: uart5-2-cfg {
> + uart5-2-pins {
> + pinmux = <K1_PADCONF(42, 2)>, /* uart5_txd */
> + <K1_PADCONF(43, 2)>; /* uart5_rxd */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart5_2_cts_rts_cfg: uart5-2-cts-rts-cfg {
> + uart5-2-pins {
> + pinmux = <K1_PADCONF(44, 2)>, /* uart5_cts */
> + <K1_PADCONF(45, 2)>; /* uart5_rts */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart5_3_cfg: uart5-3-cfg {
> + uart5-3-pins {
> + pinmux = <K1_PADCONF(70, 4)>, /* uart5_txd */
> + <K1_PADCONF(71, 4)>; /* uart5_rxd */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart5_3_cts_rts_cfg: uart5-3-cts-rts-cfg {
> + uart5-3-pins {
> + pinmux = <K1_PADCONF(72, 4)>, /* uart5_cts */
> + <K1_PADCONF(73, 4)>; /* uart5_rts */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart6_0_cfg: uart6-0-cfg {
> + uart6-0-pins {
> + pinmux = <K1_PADCONF(86, 2)>, /* uart6_txd */
> + <K1_PADCONF(87, 2)>; /* uart6_rxd */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart6_0_cts_rts_cfg: uart6-0-cts-rts-cfg {
> + uart6-0-pins {
> + pinmux = <K1_PADCONF(85, 2)>, /* uart6_cts */
> + <K1_PADCONF(90, 2)>; /* uart6_rts */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart6_1_cfg: uart6-1-cfg {
> + uart6-1-pins {
> + pinmux = <K1_PADCONF(0, 2)>, /* uart6_txd */
> + <K1_PADCONF(1, 2)>; /* uart6_rxd */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart6_1_cts_rts_cfg: uart6-1-cts-rts-cfg {
> + uart6-1-pins {
> + pinmux = <K1_PADCONF(2, 2)>, /* uart6_cts */
> + <K1_PADCONF(3, 2)>; /* uart6_rts */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart6_2_cfg: uart6-2-cfg {
> + uart6-2-pins {
> + pinmux = <K1_PADCONF(56, 2)>, /* uart6_txd */
> + <K1_PADCONF(57, 2)>; /* uart6_rxd */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart7_0_cfg: uart7-0-cfg {
> + uart7-0-pins {
> + pinmux = <K1_PADCONF(88, 2)>, /* uart7_txd */
> + <K1_PADCONF(89, 2)>; /* uart7_rxd */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart7_1_cfg: uart7-1-cfg {
> + uart7-1-pins {
> + pinmux = <K1_PADCONF(4, 2)>, /* uart7_txd */
> + <K1_PADCONF(5, 2)>; /* uart7_rxd */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart7_1_cts_rts_cfg: uart7-1-cts-rts-cfg {
> + uart7-1-pins {
> + pinmux = <K1_PADCONF(6, 2)>, /* uart7_cts */
> + <K1_PADCONF(7, 2)>; /* uart7_rts */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart8_0_cfg: uart8-0-cfg {
> + uart8-0-pins {
> + pinmux = <K1_PADCONF(82, 4)>, /* uart8_txd */
> + <K1_PADCONF(83, 4)>; /* uart8_rxd */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart8_1_cfg: uart8-1-cfg {
> + uart8-1-pins {
> + pinmux = <K1_PADCONF(8, 2)>, /* uart8_txd */
> + <K1_PADCONF(9, 2)>; /* uart8_rxd */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart8_1_cts_rts_cfg: uart8-1-cts-rts-cfg {
> + uart8-1-pins {
> + pinmux = <K1_PADCONF(10, 2)>, /* uart8_cts */
> + <K1_PADCONF(11, 2)>; /* uart8_rts */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart8_2_cfg: uart8-2-cfg {
> + uart8-2-pins {
> + pinmux = <K1_PADCONF(75, 4)>, /* uart8_txd */
> + <K1_PADCONF(76, 4)>; /* uart8_rxd */
> + power-source = <3300>;
> + bias-pull-up = <0>;
> + drive-strength = <19>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart8_2_cts_rts_cfg: uart8-2-cts-rts-cfg {
> + uart8-2-pins {
> + pinmux = <K1_PADCONF(77, 4)>, /* uart8_cts */
> + <K1_PADCONF(78, 4)>; /* uart8_rts */
> + power-source = <3300>;
> + bias-pull-up = <0>;
> + drive-strength = <19>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart9_0_cfg: uart9-0-cfg {
> + uart9-0-pins {
> + pinmux = <K1_PADCONF(12, 2)>, /* uart9_txd */
> + <K1_PADCONF(13, 2)>; /* uart9_rxd */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart9_1_cfg: uart9-1-cfg {
> + uart9-1-pins {
> + pinmux = <K1_PADCONF(116, 3)>, /* uart9_txd */
> + <K1_PADCONF(117, 3)>; /* uart9_rxd */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart9_1_cts_rts_cfg: uart9-1-cts-rts-cfg {
> + uart9-1-pins {
> + pinmux = <K1_PADCONF(110, 3)>, /* uart9_cts */
> + <K1_PADCONF(115, 3)>; /* uart9_rts */
> + bias-pull-up = <0>;
> + drive-strength = <32>;
> + };
> + };
>
> + /omit-if-no-ref/
> + uart9_2_cfg: uart9-2-cfg {
> + uart9-2-pins {
> + pinmux = <K1_PADCONF(72, 2)>, /* uart9_txd */
> + <K1_PADCONF(73, 2)>; /* uart9_rxd */
> bias-pull-up = <0>;
> drive-strength = <32>;
> };
> --
> 2.43.0
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v4] riscv: dts: spacemit: add UART pinctrl combinations
2025-09-17 7:46 ` Troy Mitchell
@ 2025-09-17 8:17 ` Hendrik Hamerlinck
2025-09-17 8:42 ` Troy Mitchell
0 siblings, 1 reply; 7+ messages in thread
From: Hendrik Hamerlinck @ 2025-09-17 8:17 UTC (permalink / raw)
To: Troy Mitchell, dlan
Cc: paul.walmsley, palmer, alex, aou, conor+dt, krzk+dt, robh, skhan,
linux-kernel-mentees, devicetree, linux-riscv, spacemit,
linux-kernel
Hello Troy,
Thank you for reviewing.
On 9/17/25 09:46, Troy Mitchell wrote:
> Hi Hendrik, Thanks for your patch!
>
> On Wed, Sep 17, 2025 at 08:59:07AM +0200, Hendrik Hamerlinck wrote:
>> Add UART pinctrl configurations based on the SoC datasheet and the
>> downstream Bianbu Linux tree. The drive strength values were taken from
>> the downstream implementation, which uses medium drive strength.
>> CTS/RTS are moved to separate *-cts-rts-cfg states so boards can enable
>> hardware flow control conditionally.
>>
>> Signed-off-by: Hendrik Hamerlinck <hendrik.hamerlinck@hammernet.be>
>> Reviewed-by: Yixun Lan <dlan@gentoo.org>
>> ---
>> Changes in v4:
>> - Explicitly use 0 as bias-pull-up value
>>
>> Changes in v3:
>> - Added /omit-if-no-ref/ to pinctrl states to reduce DT size
>>
>> Changes in v2:
>> - Split cts/rts into separate pinctrl configs as suggested
>> - Removed options from board DTS files to keep them cleaner
>> ---
>> arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 430 ++++++++++++++++++-
>> 1 file changed, 428 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
>> + /omit-if-no-ref/
>> + uart2_0_cts_rts_cfg: uart2-0-cts-rts-cfg {
>> + uart2-0-pins {
>> + pinmux = <K1_PADCONF(23, 1)>, /* uart2_cts */
>> + <K1_PADCONF(24, 1)>; /* uart2_rts */
>> + bias-pull-up = <0>;
>> + drive-strength = <32>;
>> + };
>> + };
> We are currently using the 8250 UART driver, but hardware flow control does not
> work properly on K1. We are considering fixing this when time permits.
>
> Should we add a comment here to avoid confusing others who may run into this?
> If so, I will remove the comment once the issue has been fixed.
Not sure if I’m missing something, but hardware flow control seems to work
with the `8250_of` driver?
On both ends I configured the ports with:
`stty -F /dev/ttyS1 115200 crtscts -ixon -ixoff raw -echo`
With this setup, data sent with echo only goes through when the peer is
actually reading on the other side, which looks like RTS/CTS is
functioning correctly.
>
> Anyway,
>
> Reviewed-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
>> +
>> + /omit-if-no-ref/
>> + uart3_0_cfg: uart3-0-cfg {
>> + uart3-0-pins {
>> + pinmux = <K1_PADCONF(81, 2)>, /* uart3_txd */
>> + <K1_PADCONF(82, 2)>; /* uart3_rxd */
>> + bias-pull-up = <0>;
>> + drive-strength = <32>;
>> + };
>> + };
>> +
...
>> --
>> 2.43.0
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv
Kind regards,
Hendrik
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v4] riscv: dts: spacemit: add UART pinctrl combinations
2025-09-17 8:17 ` Hendrik Hamerlinck
@ 2025-09-17 8:42 ` Troy Mitchell
2025-09-17 9:05 ` Yixun Lan
0 siblings, 1 reply; 7+ messages in thread
From: Troy Mitchell @ 2025-09-17 8:42 UTC (permalink / raw)
To: Hendrik Hamerlinck, Troy Mitchell, dlan
Cc: paul.walmsley, palmer, alex, aou, conor+dt, krzk+dt, robh, skhan,
linux-kernel-mentees, devicetree, linux-riscv, spacemit,
linux-kernel
On Wed, Sep 17, 2025 at 10:17:16AM +0200, Hendrik Hamerlinck wrote:
> Hello Troy,
>
> Thank you for reviewing.
>
> On 9/17/25 09:46, Troy Mitchell wrote:
> > Hi Hendrik, Thanks for your patch!
> >
> > On Wed, Sep 17, 2025 at 08:59:07AM +0200, Hendrik Hamerlinck wrote:
> >> Add UART pinctrl configurations based on the SoC datasheet and the
> >> downstream Bianbu Linux tree. The drive strength values were taken from
> >> the downstream implementation, which uses medium drive strength.
> >> CTS/RTS are moved to separate *-cts-rts-cfg states so boards can enable
> >> hardware flow control conditionally.
> >>
> >> Signed-off-by: Hendrik Hamerlinck <hendrik.hamerlinck@hammernet.be>
> >> Reviewed-by: Yixun Lan <dlan@gentoo.org>
> >> ---
> >> Changes in v4:
> >> - Explicitly use 0 as bias-pull-up value
> >>
> >> Changes in v3:
> >> - Added /omit-if-no-ref/ to pinctrl states to reduce DT size
> >>
> >> Changes in v2:
> >> - Split cts/rts into separate pinctrl configs as suggested
> >> - Removed options from board DTS files to keep them cleaner
> >> ---
> >> arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 430 ++++++++++++++++++-
> >> 1 file changed, 428 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> >> + /omit-if-no-ref/
> >> + uart2_0_cts_rts_cfg: uart2-0-cts-rts-cfg {
> >> + uart2-0-pins {
> >> + pinmux = <K1_PADCONF(23, 1)>, /* uart2_cts */
> >> + <K1_PADCONF(24, 1)>; /* uart2_rts */
> >> + bias-pull-up = <0>;
> >> + drive-strength = <32>;
> >> + };
> >> + };
> > We are currently using the 8250 UART driver, but hardware flow control does not
> > work properly on K1. We are considering fixing this when time permits.
> >
> > Should we add a comment here to avoid confusing others who may run into this?
> > If so, I will remove the comment once the issue has been fixed.
> Not sure if I’m missing something, but hardware flow control seems to work
> with the `8250_of` driver?
>
> On both ends I configured the ports with:
> `stty -F /dev/ttyS1 115200 crtscts -ixon -ixoff raw -echo`
>
> With this setup, data sent with echo only goes through when the peer is
> actually reading on the other side, which looks like RTS/CTS is
> functioning correctly.
Let me clarify my earlier reply(I have double checked):
It is not that hardware flow control does not work at all,
but rather that it fails intermittently.
The higher the baud rate, the sooner the problem tends to show up.
From your log I noticed the baud rate is 115200.
At this rate, it might take a full day of continuous testing before
the issue appears (though of course it could also fail much sooner, since it is probabilistic).
So I am wondering whether we should add a comment here,
or instead put the note in the UART node.
- Troy
>
> >
> > Anyway,
> >
> > Reviewed-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
> >> +
> >> + /omit-if-no-ref/
> >> + uart3_0_cfg: uart3-0-cfg {
> >> + uart3-0-pins {
> >> + pinmux = <K1_PADCONF(81, 2)>, /* uart3_txd */
> >> + <K1_PADCONF(82, 2)>; /* uart3_rxd */
> >> + bias-pull-up = <0>;
> >> + drive-strength = <32>;
> >> + };
> >> + };
> >> +
> ...
> >> --
> >> 2.43.0
> >>
> >>
> >> _______________________________________________
> >> linux-riscv mailing list
> >> linux-riscv@lists.infradead.org
> >> http://lists.infradead.org/mailman/listinfo/linux-riscv
> Kind regards,
> Hendrik
>
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v4] riscv: dts: spacemit: add UART pinctrl combinations
2025-09-17 8:42 ` Troy Mitchell
@ 2025-09-17 9:05 ` Yixun Lan
2025-09-17 9:10 ` Troy Mitchell
0 siblings, 1 reply; 7+ messages in thread
From: Yixun Lan @ 2025-09-17 9:05 UTC (permalink / raw)
To: Troy Mitchell
Cc: Hendrik Hamerlinck, paul.walmsley, palmer, alex, aou, conor+dt,
krzk+dt, robh, skhan, linux-kernel-mentees, devicetree,
linux-riscv, spacemit, linux-kernel
Hi Troy,
On 16:42 Wed 17 Sep , Troy Mitchell wrote:
> On Wed, Sep 17, 2025 at 10:17:16AM +0200, Hendrik Hamerlinck wrote:
> > Hello Troy,
> >
> > Thank you for reviewing.
> >
> > On 9/17/25 09:46, Troy Mitchell wrote:
> > > Hi Hendrik, Thanks for your patch!
> > >
> > > On Wed, Sep 17, 2025 at 08:59:07AM +0200, Hendrik Hamerlinck wrote:
> > >> Add UART pinctrl configurations based on the SoC datasheet and the
> > >> downstream Bianbu Linux tree. The drive strength values were taken from
> > >> the downstream implementation, which uses medium drive strength.
> > >> CTS/RTS are moved to separate *-cts-rts-cfg states so boards can enable
> > >> hardware flow control conditionally.
> > >>
> > >> Signed-off-by: Hendrik Hamerlinck <hendrik.hamerlinck@hammernet.be>
> > >> Reviewed-by: Yixun Lan <dlan@gentoo.org>
> > >> ---
> > >> Changes in v4:
> > >> - Explicitly use 0 as bias-pull-up value
> > >>
> > >> Changes in v3:
> > >> - Added /omit-if-no-ref/ to pinctrl states to reduce DT size
> > >>
> > >> Changes in v2:
> > >> - Split cts/rts into separate pinctrl configs as suggested
> > >> - Removed options from board DTS files to keep them cleaner
> > >> ---
> > >> arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 430 ++++++++++++++++++-
> > >> 1 file changed, 428 insertions(+), 2 deletions(-)
> > >>
> > >> diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> > >> + /omit-if-no-ref/
> > >> + uart2_0_cts_rts_cfg: uart2-0-cts-rts-cfg {
> > >> + uart2-0-pins {
> > >> + pinmux = <K1_PADCONF(23, 1)>, /* uart2_cts */
> > >> + <K1_PADCONF(24, 1)>; /* uart2_rts */
> > >> + bias-pull-up = <0>;
> > >> + drive-strength = <32>;
> > >> + };
> > >> + };
> > > We are currently using the 8250 UART driver, but hardware flow control does not
> > > work properly on K1. We are considering fixing this when time permits.
> > >
> > > Should we add a comment here to avoid confusing others who may run into this?
> > > If so, I will remove the comment once the issue has been fixed.
> > Not sure if I’m missing something, but hardware flow control seems to work
> > with the `8250_of` driver?
> >
> > On both ends I configured the ports with:
> > `stty -F /dev/ttyS1 115200 crtscts -ixon -ixoff raw -echo`
> >
> > With this setup, data sent with echo only goes through when the peer is
> > actually reading on the other side, which looks like RTS/CTS is
> > functioning correctly.
> Let me clarify my earlier reply(I have double checked):
> It is not that hardware flow control does not work at all,
> but rather that it fails intermittently.
> The higher the baud rate, the sooner the problem tends to show up.
>
> From your log I noticed the baud rate is 115200.
> At this rate, it might take a full day of continuous testing before
> the issue appears (though of course it could also fail much sooner, since it is probabilistic).
>
> So I am wondering whether we should add a comment here,
> or instead put the note in the UART node.
No, please start another thread to address this issue, find a solution
and then ideally work out a patch for it, adding comment doesn't really help.
Besides, what Hendrik doing here is to complete the descriptions of UART pinctrl
which is a different thing, let's not mix them together.
--
Yixun Lan (dlan)
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v4] riscv: dts: spacemit: add UART pinctrl combinations
2025-09-17 9:05 ` Yixun Lan
@ 2025-09-17 9:10 ` Troy Mitchell
0 siblings, 0 replies; 7+ messages in thread
From: Troy Mitchell @ 2025-09-17 9:10 UTC (permalink / raw)
To: Yixun Lan, Troy Mitchell
Cc: Hendrik Hamerlinck, paul.walmsley, palmer, alex, aou, conor+dt,
krzk+dt, robh, skhan, linux-kernel-mentees, devicetree,
linux-riscv, spacemit, linux-kernel
On Wed, Sep 17, 2025 at 05:05:32PM +0800, Yixun Lan wrote:
> Hi Troy,
>
> On 16:42 Wed 17 Sep , Troy Mitchell wrote:
> > On Wed, Sep 17, 2025 at 10:17:16AM +0200, Hendrik Hamerlinck wrote:
> > > Hello Troy,
> > >
> > > Thank you for reviewing.
> > >
> > > On 9/17/25 09:46, Troy Mitchell wrote:
> > > > Hi Hendrik, Thanks for your patch!
> > > >
> > > > On Wed, Sep 17, 2025 at 08:59:07AM +0200, Hendrik Hamerlinck wrote:
> > > >> Add UART pinctrl configurations based on the SoC datasheet and the
> > > >> downstream Bianbu Linux tree. The drive strength values were taken from
> > > >> the downstream implementation, which uses medium drive strength.
> > > >> CTS/RTS are moved to separate *-cts-rts-cfg states so boards can enable
> > > >> hardware flow control conditionally.
> > > >>
> > > >> Signed-off-by: Hendrik Hamerlinck <hendrik.hamerlinck@hammernet.be>
> > > >> Reviewed-by: Yixun Lan <dlan@gentoo.org>
> > > >> ---
> > > >> Changes in v4:
> > > >> - Explicitly use 0 as bias-pull-up value
> > > >>
> > > >> Changes in v3:
> > > >> - Added /omit-if-no-ref/ to pinctrl states to reduce DT size
> > > >>
> > > >> Changes in v2:
> > > >> - Split cts/rts into separate pinctrl configs as suggested
> > > >> - Removed options from board DTS files to keep them cleaner
> > > >> ---
> > > >> arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 430 ++++++++++++++++++-
> > > >> 1 file changed, 428 insertions(+), 2 deletions(-)
> > > >>
> > > >> diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> > > >> + /omit-if-no-ref/
> > > >> + uart2_0_cts_rts_cfg: uart2-0-cts-rts-cfg {
> > > >> + uart2-0-pins {
> > > >> + pinmux = <K1_PADCONF(23, 1)>, /* uart2_cts */
> > > >> + <K1_PADCONF(24, 1)>; /* uart2_rts */
> > > >> + bias-pull-up = <0>;
> > > >> + drive-strength = <32>;
> > > >> + };
> > > >> + };
> > > > We are currently using the 8250 UART driver, but hardware flow control does not
> > > > work properly on K1. We are considering fixing this when time permits.
> > > >
> > > > Should we add a comment here to avoid confusing others who may run into this?
> > > > If so, I will remove the comment once the issue has been fixed.
> > > Not sure if I’m missing something, but hardware flow control seems to work
> > > with the `8250_of` driver?
> > >
> > > On both ends I configured the ports with:
> > > `stty -F /dev/ttyS1 115200 crtscts -ixon -ixoff raw -echo`
> > >
> > > With this setup, data sent with echo only goes through when the peer is
> > > actually reading on the other side, which looks like RTS/CTS is
> > > functioning correctly.
> > Let me clarify my earlier reply(I have double checked):
> > It is not that hardware flow control does not work at all,
> > but rather that it fails intermittently.
> > The higher the baud rate, the sooner the problem tends to show up.
> >
> > From your log I noticed the baud rate is 115200.
> > At this rate, it might take a full day of continuous testing before
> > the issue appears (though of course it could also fail much sooner, since it is probabilistic).
> >
> > So I am wondering whether we should add a comment here,
> > or instead put the note in the UART node.
> No, please start another thread to address this issue, find a solution
> and then ideally work out a patch for it, adding comment doesn't really help.
Yes, we already have a solution. If I can spare some time soon,
I will clean it up and post it ASAP.
Thanks for the reminder, Yixun. Indeed, adding a comment doesn’t really help here.
>
> Besides, what Hendrik doing here is to complete the descriptions of UART pinctrl
> which is a different thing, let's not mix them together.
Yes, my rb is valid.
- Troy
>
> --
> Yixun Lan (dlan)
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v4] riscv: dts: spacemit: add UART pinctrl combinations
2025-09-17 6:59 [PATCH v4] riscv: dts: spacemit: add UART pinctrl combinations Hendrik Hamerlinck
2025-09-17 7:46 ` Troy Mitchell
@ 2025-10-13 23:59 ` Yixun Lan
1 sibling, 0 replies; 7+ messages in thread
From: Yixun Lan @ 2025-10-13 23:59 UTC (permalink / raw)
To: robh, krzk+dt, conor+dt, paul.walmsley, palmer, aou, alex,
Hendrik Hamerlinck
Cc: Yixun Lan, skhan, linux-kernel-mentees, devicetree, linux-riscv,
spacemit, linux-kernel
On Wed, 17 Sep 2025 08:59:07 +0200, Hendrik Hamerlinck wrote:
> Add UART pinctrl configurations based on the SoC datasheet and the
> downstream Bianbu Linux tree. The drive strength values were taken from
> the downstream implementation, which uses medium drive strength.
> CTS/RTS are moved to separate *-cts-rts-cfg states so boards can enable
> hardware flow control conditionally.
>
>
> [...]
Applied, thanks!
[1/1] riscv: dts: spacemit: add UART pinctrl combinations
https://github.com/spacemit-com/linux/commit/1187f9b3f6ebde806289877fa710ffd58f950104
Best regards,
--
Yixun Lan
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2025-10-14 0:00 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-09-17 6:59 [PATCH v4] riscv: dts: spacemit: add UART pinctrl combinations Hendrik Hamerlinck
2025-09-17 7:46 ` Troy Mitchell
2025-09-17 8:17 ` Hendrik Hamerlinck
2025-09-17 8:42 ` Troy Mitchell
2025-09-17 9:05 ` Yixun Lan
2025-09-17 9:10 ` Troy Mitchell
2025-10-13 23:59 ` Yixun Lan
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