From: Conor Dooley <conor@kernel.org>
To: Linus Walleij <linusw@kernel.org>
Cc: Linus Walleij <linus.walleij@linaro.org>,
Conor Dooley <conor.dooley@microchip.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org,
Valentina.FernandezAlanis@microchip.com,
Bartosz Golaszewski <brgl@bgdev.pl>
Subject: Re: [RFC v1 2/4] pinctrl: add polarfire soc mssio pinctrl driver
Date: Tue, 25 Nov 2025 00:24:03 +0000 [thread overview]
Message-ID: <20251125-worsening-campsite-983a1674872b@spud> (raw)
In-Reply-To: <CAD++jLm6iDJkUHQyQ+JnH76yC8FcWtjon9s1yhavoX9Y3=wZcA@mail.gmail.com>
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On Tue, Nov 25, 2025 at 01:10:26AM +0100, Linus Walleij wrote:
> On Fri, Nov 21, 2025 at 12:21 PM Conor Dooley <conor@kernel.org> wrote:
>
> > ngl, I forget if there's a shorthand for the bias part, so I just want
> > to know if is this an accurate summary of what's exclusive?
> >
> > diff --git a/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml b/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml
> > index cbfcf215e571..6865472ac124 100644
> > --- a/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml
> > +++ b/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml
> > @@ -153,4 +153,66 @@ properties:
> > pin. Typically indicates how many double-inverters are
> > used to delay the signal.
> >
> > +allOf:
> > + - if:
> > + required:
> > + - output-disable
> > + then:
> > + properties:
> > + output-enable: false
> > + output-impedance-ohms: false
>
> Looks right.
>
> > + - if:
> > + required:
> > + - output-low
> > + then:
> > + properties:
> > + output-high: false
>
> Looks right.
>
> > + - if:
> > + required:
> > + - low-power-enable
> > + then:
> > + properties:
> > + low-power-disable: false
>
> Looks right.
>
> > + - if:
> > + required:
> > + - input-schmitt-disable
> > + then:
> > + properties:
> > + input-schmitt-enable: false
> > + input-schmitt-microvolt: false
>
> Looks right.
>
> > + - if:
> > + required:
> > + - drive-open-source
> > + then:
> > + properties:
> > + drive-open-drain: false
>
> drive-push-pull is mutually exclusive
> with each of these as well.
>
> > + - if:
> > + anyOf:
> > + - required:
> > + - bias-disable
> > + - required:
> > + - bias-high-impedance
> > + - required:
> > + - bias-hold
> > + - required:
> > + - bias-up
> > + - required:
> > + - bias-down
> > + - required:
> > + - bias-pull-pin-default
> > + then:
> > + oneOf:
> > + - required:
> > + - bias-disable
> > + - required:
> > + - bias-high-impedance
> > + - required:
> > + - bias-hold
> > + - required:
> > + - bias-up
> > + - required:
> > + - bias-down
> > + - required:
> > + - bias-pull-pin-default
>
> These is a bunch of "pull" infixes missing from the
> above.
lol, that's silly to miss.
> After looking at it for a while I concluded this
> is right as well, if just the right names are added.
> I would add a comment like
>
> # We can only ever allow exactly one of these,
> # they are all mutually exclusive.
>
> Additionally:
>
> drive-strength and drive-strength-microamp are mutually
> exclusive.
Oh right yea, didn't notice that one.
> input-enable and input-disable are mutually exclusive.
And this one I meant to do and forgot.
> low-power-enable and low-power-disable are mutually
> exclusive.
This I did do.
> input-schmitt need to be added as deprecated.
I figured the best way to deprecate it was not add it at all to the
binding? Deprecated properties don't warn, undocumented ones do.
> Can you cook a patch? Maybe test it on the existing
> device trees first to see that it doesn't wreac havoc.
Yeah, I'll send it along with whatever the code equivalent ends up
being. I tested against riscv, which is a tiny sample. I'll probably do
it on the arms before submitting and see.
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next prev parent reply other threads:[~2025-11-25 0:24 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-12 14:31 [RFC v1 0/4] Microchip mpfs/pic64gx pinctrl part 2 Conor Dooley
2025-11-12 14:31 ` [RFC v1 1/4] dt-bindings: pinctrl: document polarfire soc mssio pin controller Conor Dooley
2025-11-19 9:13 ` Linus Walleij
2025-11-12 14:31 ` [RFC v1 2/4] pinctrl: add polarfire soc mssio pinctrl driver Conor Dooley
2025-11-19 12:08 ` Linus Walleij
2025-11-19 18:23 ` Conor Dooley
2025-11-19 21:48 ` Linus Walleij
2025-11-20 0:26 ` Conor Dooley
2025-11-20 23:13 ` Linus Walleij
2025-11-21 10:46 ` Conor Dooley
2025-11-21 11:21 ` Conor Dooley
2025-11-24 17:16 ` Conor Dooley
2025-11-25 0:31 ` Linus Walleij
2025-11-25 1:03 ` Conor Dooley
2025-11-25 16:09 ` Linus Walleij
2025-11-25 0:10 ` Linus Walleij
2025-11-25 0:24 ` Conor Dooley [this message]
2025-11-24 19:14 ` Conor Dooley
2025-11-25 13:24 ` Linus Walleij
2025-11-25 17:47 ` Conor Dooley
2025-11-25 19:28 ` Linus Walleij
2025-11-25 19:55 ` Conor Dooley
2025-11-25 19:59 ` Linus Walleij
2025-11-12 14:31 ` [RFC v1 3/4] MAINTAINERS: add Microchip mpfs mssio driver/bindings to entry Conor Dooley
2025-11-12 14:31 ` [RFC v1 4/4] riscv: dts: microchip: add pinctrl nodes for mpfs/icicle kit Conor Dooley
2025-11-19 12:16 ` [RFC v1 0/4] Microchip mpfs/pic64gx pinctrl part 2 Linus Walleij
2025-11-19 18:06 ` Conor Dooley
2025-11-19 21:31 ` Linus Walleij
2025-11-20 0:25 ` Conor Dooley
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