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From: Conor Dooley <conor@kernel.org>
To: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Cc: Linus Walleij <linusw@kernel.org>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Linus Walleij <linus.walleij@linaro.org>,
	Rob Herring <robh@kernel.org>, Conor Dooley <conor+dt@kernel.org>,
	Magnus Damm <magnus.damm@gmail.com>,
	linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Biju Das <biju.das.jz@bp.renesas.com>,
	Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH 1/2] dt-bindings: pinctrl: renesas,r9a09g077: Document pin configuration properties
Date: Thu, 19 Mar 2026 01:36:33 +0000	[thread overview]
Message-ID: <20260319-cleat-doorman-922ab3729b52@spud> (raw)
In-Reply-To: <CA+V-a8vNeJdbjJ6K9QkedHgAprC=Z0ckUztwe1ZapSiqjPKEsw@mail.gmail.com>

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On Wed, Mar 18, 2026 at 09:30:06PM +0000, Lad, Prabhakar wrote:
> Hi All,
> 
> On Mon, Jan 19, 2026 at 12:10 AM Linus Walleij <linusw@kernel.org> wrote:
> >
> > Hi Lad,
> >
> > I think this back-and-forth must be a bit stressful. Sorry about that.
> >
> > On Wed, Jan 14, 2026 at 9:53 PM Lad, Prabhakar
> > <prabhakar.csengg@gmail.com> wrote:
> >
> > > > > > > > +      renesas,drive-strength:
> > > > > > > > +        description:
> > > > > > > > +          Drive strength configuration value. Valid values are 0 to 3, representing
> > > > > > > > +          increasing drive strength from low, medium, high and ultra high.
> > > > > > >
> >
> > > I got the feedback from the HW team "The RZ/T2H drive strength
> > > (driving ability) is expressed using abstract levels such as Low,
> > > Middle, and High. These values do not correspond directly to specific
> > > mA units.
> >
> > But they do correspond to *something* electrical inside the
> > silicon do they not? Then what is that?
> >
> > I think it is just 1, 2, 3 or 4 driver stages.
> >
> > > To determine how much current the pin can actually drive,
> > > the engineer must refer to the electrical characteristics table.
> > > Therefore, the drive strength in RZ/T2H is a parameter that switches
> > > the internal output transistor mode rather than directly representing
> > > a physical drive current.
> > >
> > > Consequently, expressing RZ/T2H drive strength in milli- or
> > > micro-amps, as suggested by the reviewer, is inappropriate. To
> > > accurately reflect the SoC's hardware specification, introducing a
> > > custom property is essential."
> >
> Sorry for the confusion , there was a miscommunication regarding the
> specs, but it’s all been sorted out. The drive-strength settings on
> this chip are 2.5/5/9/11.8 mA, I will represent them using the
> drive-strength-microamp DT property and send a new version.

neat :)

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  reply	other threads:[~2026-03-19  1:36 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-14 19:11 [PATCH 0/2] Add support for configuring pin properties on RZ/T2H-N2H SoCs Prabhakar
2025-10-14 19:11 ` [PATCH 1/2] dt-bindings: pinctrl: renesas,r9a09g077: Document pin configuration properties Prabhakar
2025-10-16 16:41   ` Conor Dooley
2025-10-17 15:33     ` Lad, Prabhakar
2025-10-17 15:45       ` Conor Dooley
2025-12-08 10:36       ` Lad, Prabhakar
2025-12-08 18:00         ` Conor Dooley
2025-12-11  0:00           ` Linus Walleij
2025-12-12 11:11             ` Lad, Prabhakar
2026-01-14 20:53           ` Lad, Prabhakar
2026-01-14 22:26             ` Conor Dooley
2026-01-16 14:28             ` Krzysztof Kozlowski
2026-01-19  0:09             ` Linus Walleij
2026-03-18 21:30               ` Lad, Prabhakar
2026-03-19  1:36                 ` Conor Dooley [this message]
2026-03-20 13:29                 ` Linus Walleij
2025-10-20 21:25   ` Linus Walleij
2025-10-14 19:11 ` [PATCH 2/2] pinctrl: renesas: rzt2h: Add pin configuration support Prabhakar
2026-03-03 13:53   ` Geert Uytterhoeven
2026-03-12 11:42     ` Lad, Prabhakar

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