From: Florian Eckert <fe@dev.tdt.de>
To: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Johan Hovold" <johan+linaro@kernel.org>,
"Sajid Dalvi" <sdalvi@google.com>,
"Ajay Agarwal" <ajayagarwal@google.com>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, Florian Eckert <fe@dev.tdt.de>,
Eckert.Florian@googlemail.com, ms@dev.tdt.de
Subject: [PATCH v4 7/7] dt-bindings: PCI: intel,lgm-pcie: Add atu resource
Date: Wed, 15 Apr 2026 10:01:53 +0200 (CEST) [thread overview]
Message-ID: <20260415-pcie-intel-gw-v4-7-ad45d2418c8e@dev.tdt.de> (raw)
In-Reply-To: <20260415-pcie-intel-gw-v4-0-ad45d2418c8e@dev.tdt.de>
The 'atu' information is already set in the dwc core, if it is specified
in the devicetree. The driver uses its own default, if not set in the
devicetree. This information is hardware specific and should therefore be
maintained in the devicetree rather than in the source.
To be backward compatible, this field is not mandatory. If 'atu'
resource is not specified in the devicetree, the driver’s default value
is used.
Signed-off-by: Florian Eckert <fe@dev.tdt.de>
---
Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml b/Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
index 54e2890ae6314ac6847fc23f49440d05d66d87d4..9b7a8ef77585677841c7064c5001110bc2b65db1 100644
--- a/Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
@@ -27,16 +27,19 @@ properties:
- const: snps,dw-pcie
reg:
+ minItems: 3
items:
- description: Controller control and status registers.
- description: PCIe configuration registers.
- description: Controller application registers.
+ - description: Internal Address Translation Unit (iATU) registers.
reg-names:
items:
- const: dbi
- const: config
- const: app
+ - const: atu
ranges:
maxItems: 1
@@ -95,8 +98,9 @@ examples:
#size-cells = <2>;
reg = <0xd0e00000 0x1000>,
<0xd2000000 0x800000>,
- <0xd0a41000 0x1000>;
- reg-names = "dbi", "config", "app";
+ <0xd0a41000 0x1000>,
+ <0xd0ec0000 0x1000>;
+ reg-names = "dbi", config", "app", "atu";
linux,pci-domain = <0>;
max-link-speed = <4>;
bus-range = <0x00 0x08>;
--
2.47.3
next prev parent reply other threads:[~2026-04-15 8:19 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-15 8:01 [PATCH v4 0/7] PCI: intel-gw: Fixes to make the driver working again Florian Eckert
2026-04-15 8:01 ` [PATCH v4 1/7] MAINTAINERS: Remove bouncing intel-gw maintainer Florian Eckert
2026-04-15 8:01 ` [PATCH v4 2/7] PCI: intel-gw: Remove unused define Florian Eckert
2026-04-15 8:01 ` [PATCH v4 3/7] PCI: intel-gw: Move interrupt enable to own function Florian Eckert
2026-04-15 8:01 ` [PATCH v4 4/7] PCI: intel-gw: Enable clock before phy init Florian Eckert
2026-04-15 8:01 ` [PATCH v4 5/7] PCI: intel-gw: Add start_link callback function Florian Eckert
2026-04-15 8:01 ` [PATCH v4 6/7] PCI: intel-gw: Move driver atu base assignment to probe function Florian Eckert
2026-04-15 8:01 ` Florian Eckert [this message]
2026-04-15 9:24 ` [PATCH v4 7/7] dt-bindings: PCI: intel,lgm-pcie: Add atu resource Rob Herring (Arm)
2026-04-15 12:09 ` Rob Herring
2026-04-15 12:26 ` Florian Eckert
2026-04-15 12:46 ` Rob Herring
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