From: Conor Dooley <conor@kernel.org>
To: Dinh Nguyen <dinguyen@kernel.org>
Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCHv2 1/2] dt-bindings: arm: altera: document the Agilex7-M devkit
Date: Mon, 20 Apr 2026 17:13:11 +0100 [thread overview]
Message-ID: <20260420-city-freeload-46c1fe67ee8a@spud> (raw)
In-Reply-To: <20260419232416.68331-1-dinguyen@kernel.org>
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On Sun, Apr 19, 2026 at 06:24:15PM -0500, Dinh Nguyen wrote:
> The Agilex7-M is a rebranded version of the original Agilex SoC. The
> Agilex7-M SoC has the same core peripherals as the Agilex device.
>
> This change is to document the Agilex7m devkit which has the Agilex7-M
> device. The Agilex7-M SoC supports DDR4, DDR5, LPDDR5, PCIE 5.0(x16), but
> not QSPI.
>
> Also, now that Altera has separated from Intel, use the "altr" company
> prefix.
>
> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable
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prev parent reply other threads:[~2026-04-20 16:13 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-19 23:24 [PATCHv2 1/2] dt-bindings: arm: altera: document the Agilex7-M devkit Dinh Nguyen
2026-04-19 23:24 ` [PATCHv2 2/2] arm64: dts: socfpga: agilex7m: Add SoCFPGA " Dinh Nguyen
2026-04-20 16:13 ` Conor Dooley [this message]
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