* [PATCH v1] arm64: dts: cix: Add SCMI performance domains for CPUFreq on Sky1
@ 2026-04-30 11:35 Devin Li
0 siblings, 0 replies; only message in thread
From: Devin Li @ 2026-04-30 11:35 UTC (permalink / raw)
To: peter.chen, fugang.duan, robh, krzk+dt, conor+dt,
cix-kernel-upstream
Cc: linux-arm-kernel, devicetree, linux-kernel, guoyin.chen,
robin.wang, hong.guo, Devin.Li
From: "devin.li" <Devin.Li@cixtech.com>
Add SCMI Protocol 13 (Performance) node under ap_to_pm_scmi with
domains.
Define SKY1_PERF_* macros in sky1-power.h for all performance domain
IDs (CPU L/B0/B1/M0/M1, GPU, DSU, NPU, VPU, CI700, NI700), and
wire each CPU node to its corresponding performance domain using
power-domains and power-domain-names properties.
Signed-off-by: Devin Li <Devin.Li@cixtech.com>
---
arch/arm64/boot/dts/cix/sky1-power.h | 13 +++++++++++++
arch/arm64/boot/dts/cix/sky1.dtsi | 29 ++++++++++++++++++++++++++++
2 files changed, 42 insertions(+)
diff --git a/arch/arm64/boot/dts/cix/sky1-power.h b/arch/arm64/boot/dts/cix/sky1-power.h
index 53f4a3af36b3..144567579b71 100644
--- a/arch/arm64/boot/dts/cix/sky1-power.h
+++ b/arch/arm64/boot/dts/cix/sky1-power.h
@@ -30,4 +30,17 @@
#define SKY1_PD_ISP0 20
#define SKY1_PD_GPU 21
+#define SKY1_PERF_GPU_CORE 0
+#define SKY1_PERF_GPU_TOP 1
+#define SKY1_PERF_CPU_L 2
+#define SKY1_PERF_CPU_B0 3
+#define SKY1_PERF_CPU_B1 4
+#define SKY1_PERF_CPU_M0 5
+#define SKY1_PERF_CPU_M1 6
+#define SKY1_PERF_DSU 7
+#define SKY1_PERF_NPU 8
+#define SKY1_PERF_VPU 9
+#define SKY1_PERF_CI700 10
+#define SKY1_PERF_NI700 11
+
#endif
diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi
index 0611098b5f05..a77c52296ebd 100644
--- a/arch/arm64/boot/dts/cix/sky1.dtsi
+++ b/arch/arm64/boot/dts/cix/sky1.dtsi
@@ -22,6 +22,8 @@ cpu0: cpu@0 {
enable-method = "psci";
reg = <0x0 0x0>;
device_type = "cpu";
+ power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>;
+ power-domain-names = "perf";
capacity-dmips-mhz = <403>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
@@ -31,6 +33,8 @@ cpu1: cpu@100 {
enable-method = "psci";
reg = <0x0 0x100>;
device_type = "cpu";
+ power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>;
+ power-domain-names = "perf";
capacity-dmips-mhz = <403>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
@@ -40,6 +44,8 @@ cpu2: cpu@200 {
enable-method = "psci";
reg = <0x0 0x200>;
device_type = "cpu";
+ power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>;
+ power-domain-names = "perf";
capacity-dmips-mhz = <403>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
@@ -49,6 +55,8 @@ cpu3: cpu@300 {
enable-method = "psci";
reg = <0x0 0x300>;
device_type = "cpu";
+ power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>;
+ power-domain-names = "perf";
capacity-dmips-mhz = <403>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
@@ -58,6 +66,8 @@ cpu4: cpu@400 {
enable-method = "psci";
reg = <0x0 0x400>;
device_type = "cpu";
+ power-domains = <&scmi_dvfs SKY1_PERF_CPU_M0>;
+ power-domain-names = "perf";
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
@@ -67,6 +77,8 @@ cpu5: cpu@500 {
enable-method = "psci";
reg = <0x0 0x500>;
device_type = "cpu";
+ power-domains = <&scmi_dvfs SKY1_PERF_CPU_M0>;
+ power-domain-names = "perf";
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
@@ -76,6 +88,8 @@ cpu6: cpu@600 {
enable-method = "psci";
reg = <0x0 0x600>;
device_type = "cpu";
+ power-domains = <&scmi_dvfs SKY1_PERF_CPU_M1>;
+ power-domain-names = "perf";
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
@@ -85,6 +99,8 @@ cpu7: cpu@700 {
enable-method = "psci";
reg = <0x0 0x700>;
device_type = "cpu";
+ power-domains = <&scmi_dvfs SKY1_PERF_CPU_M1>;
+ power-domain-names = "perf";
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
@@ -94,6 +110,8 @@ cpu8: cpu@800 {
enable-method = "psci";
reg = <0x0 0x800>;
device_type = "cpu";
+ power-domains = <&scmi_dvfs SKY1_PERF_CPU_B0>;
+ power-domain-names = "perf";
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
@@ -103,6 +121,8 @@ cpu9: cpu@900 {
enable-method = "psci";
reg = <0x0 0x900>;
device_type = "cpu";
+ power-domains = <&scmi_dvfs SKY1_PERF_CPU_B0>;
+ power-domain-names = "perf";
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
@@ -112,6 +132,8 @@ cpu10: cpu@a00 {
enable-method = "psci";
reg = <0x0 0xa00>;
device_type = "cpu";
+ power-domains = <&scmi_dvfs SKY1_PERF_CPU_B1>;
+ power-domain-names = "perf";
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
@@ -121,6 +143,8 @@ cpu11: cpu@b00 {
enable-method = "psci";
reg = <0x0 0xb00>;
device_type = "cpu";
+ power-domains = <&scmi_dvfs SKY1_PERF_CPU_B1>;
+ power-domain-names = "perf";
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
@@ -205,6 +229,11 @@ ap_to_pm_scmi: scmi {
#address-cells = <1>;
#size-cells = <0>;
+ scmi_dvfs: protocol@13 {
+ reg = <0x13>;
+ #power-domain-cells = <1>;
+ };
+
scmi_clk: protocol@14 {
reg = <0x14>;
#clock-cells = <1>;
--
2.49.0
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