From: Arun Muthusamy <arun.muthusamy@gaisler.com>
To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
mkl@pengutronix.de, mailhol@kernel.org
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-can@vger.kernel.org,
Arun Muthusamy <arun.muthusamy@gaisler.com>,
Daniel Hellstrom <daniel@gaisler.com>
Subject: [PATCH v7 07/15] can: grcan: add FD capability detection and nominal bit-timing
Date: Fri, 8 May 2026 09:01:13 +0200 [thread overview]
Message-ID: <20260508070121.6918-8-arun.muthusamy@gaisler.com> (raw)
In-Reply-To: <20260508070121.6918-1-arun.muthusamy@gaisler.com>
Add capability for the driver to detect CAN FD support
and adjust accordingly. Introduce structures and functions
for setting nominal bit-timing for standard CAN FD.
The `grcan_hwcap` structure defines hardware capabilities like
CAN FD support and baud-rate options. Additionally, improved
device tree compatibility by updating the `of_device_id` table
for better matching of GRCAN and GRCANFD devices. Also update
Kconfig to mention GRCANFD support.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Signed-off-by: Arun Muthusamy <arun.muthusamy@gaisler.com>
---
drivers/net/can/Kconfig | 6 +-
drivers/net/can/grcan.c | 137 +++++++++++++++++++++++++++++++++++-----
2 files changed, 125 insertions(+), 18 deletions(-)
diff --git a/drivers/net/can/Kconfig b/drivers/net/can/Kconfig
index e15e320db476..83b7dc8c925c 100644
--- a/drivers/net/can/Kconfig
+++ b/drivers/net/can/Kconfig
@@ -150,10 +150,12 @@ config CAN_FLEXCAN
Say Y here if you want to support for Freescale FlexCAN.
config CAN_GRCAN
- tristate "Aeroflex Gaisler GRCAN and GRHCAN CAN devices"
+ tristate "Aeroflex Gaisler GRCAN(FD) and GRHCAN CAN devices"
depends on OF && HAS_DMA && HAS_IOMEM
help
- Say Y here if you want to use Aeroflex Gaisler GRCAN or GRHCAN.
+ Say Y here if you want to use Aeroflex Gaisler GRCAN or GRCANFD
+ or GRHCAN.
+
Note that the driver supports little endian, even though little
endian syntheses of the cores would need some modifications on
the hardware level to work.
diff --git a/drivers/net/can/grcan.c b/drivers/net/can/grcan.c
index 8ba21d94e87d..c9175a6a013f 100644
--- a/drivers/net/can/grcan.c
+++ b/drivers/net/can/grcan.c
@@ -33,6 +33,7 @@
#include <linux/platform_device.h>
#include <linux/spinlock.h>
#include <linux/of.h>
+#include <linux/of_device.h>
#include <linux/of_irq.h>
#include <linux/clk.h>
#include <linux/dma-mapping.h>
@@ -51,7 +52,11 @@ struct grcan_registers {
u32 __reserved1[GRCAN_RESERVE_SIZE(0x08, 0x18)];
u32 smask; /* 0x18 - CanMASK */
u32 scode; /* 0x1c - CanCODE */
- u32 __reserved2[GRCAN_RESERVE_SIZE(0x1c, 0x100)];
+ u32 __reserved2[GRCAN_RESERVE_SIZE(0x1c, 0x40)];
+ u32 nbtr; /* 0x40 */
+ u32 fdbtr; /* 0x44 */
+ u32 tdelay; /* 0x48 */
+ u32 __reserved2_[GRCAN_RESERVE_SIZE(0x48, 0x100)];
u32 pimsr; /* 0x100 */
u32 pimr; /* 0x104 */
u32 pisr; /* 0x108 */
@@ -203,6 +208,39 @@ struct grcan_registers {
#error "Invalid default buffer size"
#endif
+#define GRCANFD_NBTR_SCALER GENMASK(23, 16)
+#define GRCANFD_NBTR_PS1 GENMASK(17, 10)
+#define GRCANFD_NBTR_PS2 GENMASK(9, 5)
+#define GRCANFD_NBTR_SJW GENMASK(4, 0)
+#define GRCANFD_NBTR_TIMING \
+ (GRCANFD_NBTR_SCALER | GRCANFD_NBTR_PS1 | GRCANFD_NBTR_PS2 | \
+ GRCANFD_NBTR_SJW)
+
+#define GRCANFD_FDBTR_SCALER 0x00ff0000
+#define GRCANFD_FDBTR_PS1 0x00003c00
+#define GRCANFD_FDBTR_PS2 0x000001e0
+#define GRCANFD_FDBTR_SJW 0x0000000f
+#define GRCANFD_FDBTR_TIMING \
+ (GRCANFD_FDBTR_SCALER | GRCANFD_FDBTR_PS1 | GRCANFD_FDBTR_PS2 | \
+ GRCANFD_FDBTR_SJW)
+
+#define GRCANFD_FDBTR_SCALER_BIT 16
+#define GRCANFD_FDBTR_PS1_BIT 10
+#define GRCANFD_FDBTR_PS2_BIT 5
+#define GRCANFD_FDBTR_SJW_BIT 0
+
+/* Hardware capabilities */
+struct grcan_hwcap {
+ /* CAN-FD capable, indicates GRCANFD IP.
+ * The GRCANFD has different baud-rate registers and extended DMA
+ * format to also describe FD-frames.
+ */
+ const struct can_bittiming_const *bt_const;
+ int (*set_bittiming)(struct net_device *dev);
+ bool txbug_possible;
+ bool fd;
+};
+
struct grcan_dma_buffer {
size_t size;
void *buf;
@@ -245,6 +283,7 @@ struct grcan_priv {
struct napi_struct napi;
struct grcan_registers __iomem *regs; /* ioremap'ed registers */
+ const struct grcan_hwcap *hwcap;
struct grcan_device_config config;
struct grcan_dma dma;
@@ -393,6 +432,19 @@ static const struct can_bittiming_const grcan_bittiming_const = {
.brp_inc = 1,
};
+/* GRCANFD nominal boundaries for baud-rate parameters */
+static const struct can_bittiming_const grcanfd_bittiming_const = {
+ .name = DRV_NAME,
+ .tseg1_min = 2,
+ .tseg1_max = 63,
+ .tseg2_min = 2,
+ .tseg2_max = 16,
+ .sjw_max = 16,
+ .brp_min = 1,
+ .brp_max = 256,
+ .brp_inc = 1,
+};
+
static int grcan_set_bittiming(struct net_device *dev)
{
struct grcan_priv *priv = netdev_priv(dev);
@@ -421,6 +473,32 @@ static int grcan_set_bittiming(struct net_device *dev)
return 0;
}
+static int grcanfd_set_bittiming(struct net_device *dev)
+{
+ struct grcan_priv *priv = netdev_priv(dev);
+ struct grcan_registers __iomem *regs;
+ int sjw, ps1, ps2, scaler;
+ struct can_bittiming *bt;
+ u32 timing = 0;
+
+ regs = priv->regs;
+ bt = &priv->can.bittiming;
+
+ sjw = bt->sjw;
+ ps1 = (bt->prop_seg + bt->phase_seg1);
+ ps2 = bt->phase_seg2;
+ scaler = bt->brp - 1;
+
+ timing |= FIELD_PREP(GRCANFD_NBTR_SJW, sjw);
+ timing |= FIELD_PREP(GRCANFD_NBTR_PS1, ps1);
+ timing |= FIELD_PREP(GRCANFD_NBTR_PS2, ps2);
+ timing |= FIELD_PREP(GRCANFD_NBTR_SCALER, scaler);
+ netdev_dbg(dev, "setting timing=0x%x\n", timing);
+ grcan_write_bits(®s->nbtr, timing, GRCANFD_NBTR_TIMING);
+
+ return 0;
+}
+
static int grcan_get_berr_counter(const struct net_device *dev,
struct can_berr_counter *bec)
{
@@ -1544,7 +1622,8 @@ static const struct ethtool_ops grcan_ethtool_ops = {
static int grcan_setup_netdev(struct platform_device *ofdev,
void __iomem *base,
- int irq, u32 ambafreq, bool txbug)
+ int irq, u32 ambafreq, bool txbug,
+ const struct grcan_hwcap *hwcap)
{
struct net_device *dev;
struct grcan_priv *priv;
@@ -1567,14 +1646,14 @@ static int grcan_setup_netdev(struct platform_device *ofdev,
priv->dev = dev;
priv->ofdev_dev = &ofdev->dev;
priv->regs = base;
- priv->can.bittiming_const = &grcan_bittiming_const;
- priv->can.do_set_bittiming = grcan_set_bittiming;
+ priv->can.bittiming_const = hwcap->bt_const;
priv->can.do_set_mode = grcan_set_mode;
priv->can.do_get_berr_counter = grcan_get_berr_counter;
priv->can.clock.freq = ambafreq;
priv->can.ctrlmode_supported =
CAN_CTRLMODE_LISTENONLY | CAN_CTRLMODE_ONE_SHOT;
priv->need_txbug_workaround = txbug;
+ priv->hwcap = hwcap;
/* Discover if triple sampling is supported by hardware */
regs = priv->regs;
@@ -1619,22 +1698,29 @@ static int grcan_probe(struct platform_device *ofdev)
{
struct device_node *np = ofdev->dev.of_node;
struct device_node *sysid_parent;
+ const struct grcan_hwcap *hwcap;
struct clk *clk;
u32 sysid, ambafreq;
int irq, err;
void __iomem *base;
bool txbug = true;
+ hwcap = device_get_match_data(&ofdev->dev);
+
/* Compare GRLIB version number with the first that does not
* have the tx bug (see start_xmit)
*/
- sysid_parent = of_find_node_by_path("/ambapp0");
- if (sysid_parent) {
- err = of_property_read_u32(sysid_parent, "systemid", &sysid);
- if (!err && ((sysid & GRLIB_VERSION_MASK) >=
- GRCAN_TXBUG_SAFE_GRLIB_VERSION))
- txbug = false;
- of_node_put(sysid_parent);
+ if (!hwcap->txbug_possible) {
+ txbug = false;
+ } else {
+ sysid_parent = of_find_node_by_path("/ambapp0");
+ if (sysid_parent) {
+ err = of_property_read_u32(sysid_parent, "systemid", &sysid);
+ if (!err && ((sysid & GRLIB_VERSION_MASK) >=
+ GRCAN_TXBUG_SAFE_GRLIB_VERSION))
+ txbug = false;
+ of_node_put(sysid_parent);
+ }
}
err = of_property_read_u32(np, "freq", &ambafreq);
@@ -1669,7 +1755,7 @@ static int grcan_probe(struct platform_device *ofdev)
grcan_sanitize_module_config(ofdev);
- err = grcan_setup_netdev(ofdev, base, irq, ambafreq, txbug);
+ err = grcan_setup_netdev(ofdev, base, irq, ambafreq, txbug, hwcap);
if (err)
goto exit_dispose_irq;
@@ -1696,11 +1782,30 @@ static void grcan_remove(struct platform_device *ofdev)
free_candev(dev);
}
+static const struct grcan_hwcap grcan_hwcap = {
+ .fd = false,
+ .txbug_possible = true,
+ .bt_const = &grcan_bittiming_const,
+ .set_bittiming = grcan_set_bittiming,
+};
+
+static const struct grcan_hwcap grcanfd_hwcap = {
+ .fd = true,
+ .txbug_possible = false,
+ .bt_const = &grcanfd_bittiming_const,
+ .set_bittiming = grcanfd_set_bittiming,
+};
+
static const struct of_device_id grcan_match[] = {
- {.name = "GAISLER_GRCAN"},
- {.name = "01_03d"},
- {.name = "GAISLER_GRHCAN"},
- {.name = "01_034"},
+ {.name = "GAISLER_GRCAN", .data = &grcan_hwcap},
+ {.name = "01_03d", .data = &grcan_hwcap},
+ {.name = "GAISLER_GRHCAN", .data = &grcan_hwcap},
+ {.name = "01_034", .data = &grcan_hwcap},
+ {.compatible = "gaisler,grcan", .data = &grcan_hwcap},
+ /* GRCANFD */
+ {.compatible = "gaisler,grcanfd", .data = &grcanfd_hwcap},
+ {.name = "GAISLER_GRCANFD", .data = &grcanfd_hwcap},
+ {.name = "01_0b5", .data = &grcanfd_hwcap},
{},
};
--
2.51.0
next prev parent reply other threads:[~2026-05-08 7:01 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-08 7:01 [PATCH v7 RESEND 00/15] can: grcan: Enhance driver with CANFD Support and Improvements Arun Muthusamy
2026-05-08 7:01 ` [PATCH v7 01/15] dt-bindings: Add vendor prefix for Frontgrade Gaisler AB Arun Muthusamy
2026-05-08 7:01 ` [PATCH v7 02/15] dt-bindings: net: can: gaisler,grcan: Convert to DT schema Arun Muthusamy
2026-05-08 18:37 ` sashiko-bot
2026-05-08 7:01 ` [PATCH v7 03/15] MAINTAINERS: Add maintainers for GRCAN CAN network driver Arun Muthusamy
2026-05-08 7:01 ` [PATCH v7 04/15] can: grcan: Add clock handling Arun Muthusamy
2026-05-08 18:50 ` sashiko-bot
2026-05-08 7:01 ` [PATCH v7 05/15] can: grcan: Replace bit timing macros with literal values Arun Muthusamy
2026-05-08 7:01 ` [PATCH v7 06/15] can: grcan: Simplify timing configuration Arun Muthusamy
2026-05-08 19:28 ` sashiko-bot
2026-05-08 7:01 ` Arun Muthusamy [this message]
2026-05-08 19:45 ` [PATCH v7 07/15] can: grcan: add FD capability detection and nominal bit-timing sashiko-bot
2026-05-08 7:01 ` [PATCH v7 08/15] can: grcan: set DMA mask for GRCAN and GRCANFD to 32-bit Arun Muthusamy
2026-05-08 19:53 ` sashiko-bot
2026-05-08 7:01 ` [PATCH v7 09/15] can: grcan: Add saving and restoring of CAN FD baud-rate registers Arun Muthusamy
2026-05-08 21:35 ` sashiko-bot
2026-05-08 7:01 ` [PATCH v7 10/15] can: grcan: Reserve space between cap and next register to align with address layout Arun Muthusamy
2026-05-08 7:01 ` [PATCH v7 11/15] can: grcan: Refactor GRCAN DMA buffer to use structured memory layout Arun Muthusamy
2026-05-08 22:03 ` sashiko-bot
2026-05-08 7:01 ` [PATCH v7 12/15] can: grcan: Add CANFD TX support alongside legacy CAN Arun Muthusamy
2026-05-08 22:40 ` sashiko-bot
2026-05-08 7:01 ` [PATCH v7 13/15] can: grcan: Add CANFD RX " Arun Muthusamy
2026-05-08 23:08 ` sashiko-bot
2026-05-08 7:01 ` [PATCH v7 14/15] can: grcan: Update echo skb handling to match variable length CANFD frame Arun Muthusamy
2026-05-08 23:25 ` sashiko-bot
2026-05-08 7:01 ` [PATCH v7 15/15] can: grcan: Advertise CANFD capability Arun Muthusamy
2026-05-08 23:50 ` sashiko-bot
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