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From: sashiko-bot@kernel.org
To: "Svyatoslav Ryhel" <clamor95@gmail.com>
Cc: krzk+dt@kernel.org, linux-phy@lists.infradead.org,
	vkoul@kernel.org, robh@kernel.org, olteanv@gmail.com,
	devicetree@vger.kernel.org, neil.armstrong@linaro.org,
	conor+dt@kernel.org
Subject: Re: [PATCH v1 5/6] dt-bindings: phy: tegra: Document Nvidia Tegra XMM6260 PHY
Date: Tue, 12 May 2026 23:29:51 +0000	[thread overview]
Message-ID: <20260512232952.02E53C2BCB0@smtp.kernel.org> (raw)
In-Reply-To: <20260511135703.62470-6-clamor95@gmail.com>

Thank you for your contribution! Sashiko AI review found 4 potential issue(s) to consider:
- [High] The binding models an external USB/HSIC modem as a standalone, virtual 'PHY' node instead of representing it accurately in the hardware hierarchy.
- [Medium] The `nvidia,usb-bus` property groups two unrelated phandles (USB controller and USB PHY) and introduces a reverse-dependency.
- [Low] The compatible string `nvidia,tegra-xmm6260` uses the incorrect vendor prefix for the hardware it represents.
- [Low] The `nvidia,usb-bus` property is defined as a `phandle-array` but lacks the necessary `items` description to define the cell count, leading to a `dt_binding_check` validation failure.
--

commit 9a3c0eae039eb5a94c2d0ec7ecce7c586c326f99
Author: Svyatoslav Ryhel <clamor95@gmail.com>

dt-bindings: phy: tegra: Document Nvidia Tegra XMM6260 PHY

This commit documents the XMM6260 PHY binding, a hardware configuration
used in Tegra SoCs to control power sequencing and manage the USB lines
for the modem.

> diff --git a/Documentation/devicetree/bindings/phy/nvidia,tegra-xmm6260.yaml b/Documentation/devicetree/bindings/phy/nvidia,tegra-xmm6260.yaml
> new file mode 100644
> index 0000000000000..0346433c97725
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/nvidia,tegra-xmm6260.yaml
> @@ -0,0 +1,58 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/nvidia,tegra-xmm6260.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nvidia Tegra PHY for XMM6260 modem
> +
> +description:
> +  A hardware configuration used in Tegra SoCs to provide proper interaction
> +  between the application processor and the modem, as well as control over
> +  one of the SoC's USB lines for the modem.

Is modeling this external modem as a standalone virtual PHY node the best
approach for representing the hardware topology?

The device tree should describe physical hardware hierarchy. Since the
XMM6260 is an external modem connected to the host via a USB or HSIC bus,
it would traditionally be modeled as a child node of the USB controller.

Handling power sequencing by creating a virtual PHY node is a known
anti-pattern. Power requirements are typically managed by the USB subsystem's
device tree bindings or a generic power sequencing framework.

> +
> +maintainers:
> +  - Svyatoslav Ryhel <clamor95@gmail.com>
> +
> +properties:
> +  compatible:
> +    const: nvidia,tegra-xmm6260

This isn't a bug, but the XMM6260 is a modem manufactured by Infineon/Intel.
Should the compatible string use a vendor prefix corresponding to the actual
manufacturer (e.g., "infineon" or "intel") instead of "nvidia", since this
represents an external component rather than a Tegra-specific SoC block?

> +
> +  enable-gpios:
> +    description: GPIO connected to the EINT1 pin
> +    maxItems: 1
> +
> +  nvidia,usb-bus:
> +    description:
> +      Contains two phandles; the first is pointing to the Host's USB controller
> +      and the second linking to the controller's PHY.
> +    $ref: /schemas/types.yaml#/definitions/phandle-array
> +    minItems: 2
> +    maxItems: 2

Does this custom property introduce an unnecessary reverse-dependency in the
device tree?

Standard bus hierarchy dictates that relationships are established naturally
via parent-child nodes. Pointing an external device back to its host
controller via a custom phandle is a non-standard way to represent a bus
connection. Additionally, grouping two distinct hardware components (a host
controller and its PHY) into a single phandle array mixes unrelated
references.

Can this property definition cause a validation failure during
dt_binding_check?

Because this is typed as a phandle-array, the dtschema validation framework
will attempt to parse the array elements by looking for a
"#nvidia,usb-bus-cells" property on the referenced target nodes (the USB
controller and PHY). Since those target nodes won't define that custom cells
property, the example schema validation is likely to fail.

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260511135703.62470-1-clamor95@gmail.com?part=5

  reply	other threads:[~2026-05-12 23:29 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-11 13:56 [PATCH v1 0/6] Add support for Infineon/Intel XMM6260 modem Svyatoslav Ryhel
2026-05-11 13:56 ` [PATCH v1 1/6] dt-bindings: usb: ci-hdrc-usb2: Document nvidia,external-control property Svyatoslav Ryhel
2026-05-12 23:29   ` sashiko-bot
2026-05-13 17:34   ` Svyatoslav Ryhel
2026-05-11 13:56 ` [PATCH v1 2/6] usb: chipidea: tegra: Avoid controller/PHY init if bus is externally controlled Svyatoslav Ryhel
2026-05-12  1:15   ` Peter Chen (CIX)
2026-05-12  6:13     ` Svyatoslav Ryhel
2026-05-12  7:51       ` Peter Chen (CIX)
2026-05-12  9:14         ` Svyatoslav Ryhel
2026-05-13 17:30         ` Svyatoslav Ryhel
2026-05-12 23:29   ` sashiko-bot
2026-05-11 13:56 ` [PATCH v1 3/6] dt-bindings: net: Document Infineon/Intel XMM6260 modem Svyatoslav Ryhel
2026-05-12 23:29   ` sashiko-bot
2026-05-11 13:56 ` [PATCH v1 4/6] net: usb: Add Infineon XMM6260 Baseband modem support Svyatoslav Ryhel
2026-05-12 23:29   ` sashiko-bot
2026-05-11 13:57 ` [PATCH v1 5/6] dt-bindings: phy: tegra: Document Nvidia Tegra XMM6260 PHY Svyatoslav Ryhel
2026-05-12 23:29   ` sashiko-bot [this message]
2026-05-11 13:57 ` [PATCH v1 6/6] phy: tegra: Add support for " Svyatoslav Ryhel
2026-05-12 23:29   ` sashiko-bot
2026-05-12  0:05 ` [PATCH v1 0/6] Add support for Infineon/Intel XMM6260 modem Jakub Kicinski
2026-05-12  6:05   ` Svyatoslav Ryhel

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