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From: sashiko-bot@kernel.org
To: "Abel Vesa" <abel.vesa@oss.qualcomm.com>
Cc: conor+dt@kernel.org, robh@kernel.org, devicetree@vger.kernel.org,
	krzk+dt@kernel.org
Subject: Re: [PATCH 2/2] interconnect: qcom: eliza: Add SDCC1 slave node
Date: Wed, 13 May 2026 21:17:48 +0000	[thread overview]
Message-ID: <20260513211749.690A2C19425@smtp.kernel.org> (raw)
In-Reply-To: <20260512-eliza-interconnect-add-missing-sdcc1-slave-node-v1-2-b1edf81bac3b@oss.qualcomm.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The newly added `qhs_sdc1` node is missing from the `bcm_cn0` Bus Clock Manager (BCM) configuration.
--

commit d28b10055037729ce3f753377d62887c5022c5c1
Author: Abel Vesa <abel.vesa@oss.qualcomm.com>

interconnect: qcom: eliza: Add SDCC1 slave node

The Eliza interconnect provider is missing the SDCC1 CNOC CFG slave
node. Add qhs_sdc1 to the provider node table and qsm_cfg links so
SDCC1 interconnect paths can resolve to a provider node.

> diff --git a/drivers/interconnect/qcom/eliza.c b/drivers/interconnect/qcom/eliza.c
> index a4f7903f0524d..6d12a1c3c034f 100644
> --- a/drivers/interconnect/qcom/eliza.c
> +++ b/drivers/interconnect/qcom/eliza.c
[ ... ]
> @@ -392,7 +398,7 @@ static struct qcom_icc_node qsm_cfg = {
>  			&qhs_mss_cfg, &qhs_pcie_0_cfg,
>  			&qhs_prng, &qhs_qdss_cfg,
>  			&qhs_qspi, &qhs_qup1,
> -			&qhs_qup2, &qhs_sdc2,
> +			&qhs_qup2, &qhs_sdc1, &qhs_sdc2,

Should the newly added qhs_sdc1 node also be added to the bcm_cn0 Bus Clock
Manager configuration?

Currently bcm_cn0 contains qhs_sdc2, but qhs_sdc1 is missing:

static struct qcom_icc_bcm bcm_cn0 = {
        .name = "CN0",
        .enable_mask = BIT(0),
        .keepalive = true,
        .num_nodes = 43,
        .nodes = { &qsm_cfg, &qhs_ahb2phy0,
...
                   &qhs_qspi, &qhs_sdc2,
...
};

Without being added to the nodes array and incrementing num_nodes, it appears
any bandwidth requested by interconnect paths targeting SDCC1 will be ignored.

Will this cause a regression where the SDCC1 config path is prevented from
scaling the CN0 bus clocks?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260512-eliza-interconnect-add-missing-sdcc1-slave-node-v1-0-b1edf81bac3b@oss.qualcomm.com?part=2

      parent reply	other threads:[~2026-05-13 21:17 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-12 12:18 [PATCH 0/2] interconnect: qcom: eliza: Add missing SDCC1 slave Abel Vesa
2026-05-12 12:18 ` [PATCH 1/2] dt-bindings: interconnect: qcom,eliza-rpmh: Add " Abel Vesa
2026-05-12 12:18 ` [PATCH 2/2] interconnect: qcom: eliza: Add SDCC1 slave node Abel Vesa
2026-05-13 14:24   ` Dmitry Baryshkov
2026-05-13 21:17   ` sashiko-bot [this message]

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