[PATCH 0/2] interconnect: qcom: eliza: Add missing SDCC1 slave

[PATCH 0/2] interconnect: qcom: eliza: Add missing SDCC1 slave

[Abel Vesa]

Add the missing Eliza SDCC1 interconnect slave ID and provider node.

The Eliza interconnect binding and provider already describe SDCC2, but the
matching SDCC1 CNOC CFG slave was left out. Add the binding constant and the
provider node so consumers can describe SDCC1 bandwidth paths.

The provider change also adds qhs_sdc1 to qsm_cfg and updates its link count
to match the newly added entry.

Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
---
Abel Vesa (2):
      dt-bindings: interconnect: qcom,eliza-rpmh: Add SDCC1 slave
      interconnect: qcom: eliza: Add SDCC1 slave node

 drivers/interconnect/qcom/eliza.c                  | 11 +++++++++--
 include/dt-bindings/interconnect/qcom,eliza-rpmh.h |  1 +
 2 files changed, 10 insertions(+), 2 deletions(-)
---
base-commit: e98d21c170b01ddef366f023bbfcf6b31509fa83
change-id: 20260512-eliza-interconnect-add-missing-sdcc1-slave-node-65020a3b2ecc

Best regards,
--  
Abel Vesa <abel.vesa@oss.qualcomm.com>

[PATCH 1/2] dt-bindings: interconnect: qcom,eliza-rpmh: Add SDCC1 slave

[Abel Vesa]

The Eliza RPMh interconnect binding is missing the SDCC1 CNOC CFG
slave ID. Add it so SDCC1 consumer can describe the corresponding
interconnect path.

Append the new ID to preserve the existing ABI values.

Fixes: 8300438dc424 ("dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in Eliza SoC")
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
---
 include/dt-bindings/interconnect/qcom,eliza-rpmh.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/dt-bindings/interconnect/qcom,eliza-rpmh.h b/include/dt-bindings/interconnect/qcom,eliza-rpmh.h
index 95db2fe647de..dfe99feefb27 100644
--- a/include/dt-bindings/interconnect/qcom,eliza-rpmh.h
+++ b/include/dt-bindings/interconnect/qcom,eliza-rpmh.h
@@ -57,6 +57,7 @@
 #define SLAVE_PCIE_ANOC_CFG			27
 #define SLAVE_QDSS_STM				28
 #define SLAVE_TCU				29
+#define SLAVE_SDCC_1				30
 
 #define MASTER_GEM_NOC_CNOC			0
 #define MASTER_GEM_NOC_PCIE_SNOC		1

-- 
2.54.0

[PATCH 2/2] interconnect: qcom: eliza: Add SDCC1 slave node

[Abel Vesa]

The Eliza interconnect provider is missing the SDCC1 CNOC CFG slave
node. Add qhs_sdc1 to the provider node table and qsm_cfg links so
SDCC1 interconnect paths can resolve to a provider node.

Bump the qsm_cfg link count to match the new entry.

Fixes: a39efc80ff50 ("interconnect: qcom: Add Eliza interconnect provider driver")
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
---
 drivers/interconnect/qcom/eliza.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/interconnect/qcom/eliza.c b/drivers/interconnect/qcom/eliza.c
index a4f7903f0524..6d12a1c3c034 100644
--- a/drivers/interconnect/qcom/eliza.c
+++ b/drivers/interconnect/qcom/eliza.c
@@ -127,6 +127,12 @@ static struct qcom_icc_node qhs_qup2 = {
 	.buswidth = 4,
 };
 
+static struct qcom_icc_node qhs_sdc1 = {
+	.name = "qhs_sdc1",
+	.channels = 1,
+	.buswidth = 4,
+};
+
 static struct qcom_icc_node qhs_sdc2 = {
 	.name = "qhs_sdc2",
 	.channels = 1,
@@ -383,7 +389,7 @@ static struct qcom_icc_node qsm_cfg = {
 	.name = "qsm_cfg",
 	.channels = 1,
 	.buswidth = 4,
-	.num_links = 29,
+	.num_links = 30,
 	.link_nodes = { &qhs_ahb2phy0, &qhs_ahb2phy1,
 			&qhs_camera_cfg, &qhs_clk_ctl,
 			&qhs_crypto0_cfg, &qhs_display_cfg,
@@ -392,7 +398,7 @@ static struct qcom_icc_node qsm_cfg = {
 			&qhs_mss_cfg, &qhs_pcie_0_cfg,
 			&qhs_prng, &qhs_qdss_cfg,
 			&qhs_qspi, &qhs_qup1,
-			&qhs_qup2, &qhs_sdc2,
+			&qhs_qup2, &qhs_sdc1, &qhs_sdc2,
 			&qhs_tcsr, &qhs_tlmm,
 			&qhs_ufs_mem_cfg, &qhs_usb3_0,
 			&qhs_venus_cfg, &qhs_vsense_ctrl_cfg,
@@ -1321,6 +1327,7 @@ static struct qcom_icc_node * const cnoc_cfg_nodes[] = {
 	[SLAVE_QSPI_0] = &qhs_qspi,
 	[SLAVE_QUP_1] = &qhs_qup1,
 	[SLAVE_QUP_2] = &qhs_qup2,
+	[SLAVE_SDCC_1] = &qhs_sdc1,
 	[SLAVE_SDCC_2] = &qhs_sdc2,
 	[SLAVE_TCSR] = &qhs_tcsr,
 	[SLAVE_TLMM] = &qhs_tlmm,

-- 
2.54.0

Re: [PATCH 2/2] interconnect: qcom: eliza: Add SDCC1 slave node

[Dmitry Baryshkov]

On Tue, May 12, 2026 at 03:18:53PM +0300, Abel Vesa wrote:
> The Eliza interconnect provider is missing the SDCC1 CNOC CFG slave
> node. Add qhs_sdc1 to the provider node table and qsm_cfg links so
> SDCC1 interconnect paths can resolve to a provider node.
> 
> Bump the qsm_cfg link count to match the new entry.
> 
> Fixes: a39efc80ff50 ("interconnect: qcom: Add Eliza interconnect provider driver")
> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
> ---
>  drivers/interconnect/qcom/eliza.c | 11 +++++++++--
>  1 file changed, 9 insertions(+), 2 deletions(-)
> 

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>

-- 
With best wishes
Dmitry

Re: [PATCH 2/2] interconnect: qcom: eliza: Add SDCC1 slave node

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The newly added `qhs_sdc1` node is missing from the `bcm_cn0` Bus Clock Manager (BCM) configuration.
--

commit d28b10055037729ce3f753377d62887c5022c5c1
Author: Abel Vesa <abel.vesa@oss.qualcomm.com>

interconnect: qcom: eliza: Add SDCC1 slave node

The Eliza interconnect provider is missing the SDCC1 CNOC CFG slave
node. Add qhs_sdc1 to the provider node table and qsm_cfg links so
SDCC1 interconnect paths can resolve to a provider node.

> diff --git a/drivers/interconnect/qcom/eliza.c b/drivers/interconnect/qcom/eliza.c
> index a4f7903f0524d..6d12a1c3c034f 100644
> --- a/drivers/interconnect/qcom/eliza.c
> +++ b/drivers/interconnect/qcom/eliza.c
[ ... ]
> @@ -392,7 +398,7 @@ static struct qcom_icc_node qsm_cfg = {
>  			&qhs_mss_cfg, &qhs_pcie_0_cfg,
>  			&qhs_prng, &qhs_qdss_cfg,
>  			&qhs_qspi, &qhs_qup1,
> -			&qhs_qup2, &qhs_sdc2,
> +			&qhs_qup2, &qhs_sdc1, &qhs_sdc2,

Should the newly added qhs_sdc1 node also be added to the bcm_cn0 Bus Clock
Manager configuration?

Currently bcm_cn0 contains qhs_sdc2, but qhs_sdc1 is missing:

static struct qcom_icc_bcm bcm_cn0 = {
        .name = "CN0",
        .enable_mask = BIT(0),
        .keepalive = true,
        .num_nodes = 43,
        .nodes = { &qsm_cfg, &qhs_ahb2phy0,
...
                   &qhs_qspi, &qhs_sdc2,
...
};

Without being added to the nodes array and incrementing num_nodes, it appears
any bandwidth requested by interconnect paths targeting SDCC1 will be ignored.

Will this cause a regression where the SDCC1 config path is prevented from
scaling the CN0 bus clocks?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260512-eliza-interconnect-add-missing-sdcc1-slave-node-v1-0-b1edf81bac3b@oss.qualcomm.com?part=2