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From: Conor Dooley <conor@kernel.org>
To: Hal Feng <hal.feng@starfivetech.com>
Cc: "Uwe Kleine-König" <ukleinek@kernel.org>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Emil Renner Berthing" <emil.renner.berthing@canonical.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Paul Walmsley" <pjw@kernel.org>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Changhuang Liang" <changhuang.liang@starfivetech.com>,
	linux-pwm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v18 1/3] dt-bindings: pwm: opencores: Drop starfive compatibles and update maintainers
Date: Fri, 15 May 2026 14:06:21 +0100	[thread overview]
Message-ID: <20260515-blinked-gigabyte-d2882372b616@spud> (raw)
In-Reply-To: <20260515054723.25024-2-hal.feng@starfivetech.com>

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On Fri, May 15, 2026 at 01:47:20PM +0800, Hal Feng wrote:
> Each of the StarFive JH7100/JH7110/JH8100 SoCs has 8 OpenCores PTC IP
> cores. One OpenCores PTC IP core can output one PWM channel. The only
> difference among them is the register base address. There is no need
> to add starfive compatibles to distinguish them.

NAK, that's not an acceptable reason to remove soc-specific compatibles.

pw-bot: changes-requested

> 
> I will maintain the pwm module in place of William.
> 
> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> ---
>  .../devicetree/bindings/pwm/opencores,pwm.yaml         | 10 +++-------
>  1 file changed, 3 insertions(+), 7 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pwm/opencores,pwm.yaml b/Documentation/devicetree/bindings/pwm/opencores,pwm.yaml
> index 52a59d245cdb..834fb17ec595 100644
> --- a/Documentation/devicetree/bindings/pwm/opencores,pwm.yaml
> +++ b/Documentation/devicetree/bindings/pwm/opencores,pwm.yaml
> @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
>  title: OpenCores PWM controller
>  
>  maintainers:
> -  - William Qiu <william.qiu@starfivetech.com>
> +  - Hal Feng <hal.feng@starfivetech.com>
>  
>  description:
>    The OpenCores PTC ip core contains a PWM controller. When operating in PWM
> @@ -20,10 +20,6 @@ allOf:
>  properties:
>    compatible:
>      items:
> -      - enum:
> -          - starfive,jh7100-pwm
> -          - starfive,jh7110-pwm
> -          - starfive,jh8100-pwm
>        - const: opencores,pwm-v1
>  
>    reg:
> @@ -48,8 +44,8 @@ additionalProperties: false
>  examples:
>    - |
>      pwm@12490000 {
> -        compatible = "starfive,jh7110-pwm", "opencores,pwm-v1";
> -        reg = <0x12490000 0x10000>;
> +        compatible = "opencores,pwm-v1";
> +        reg = <0x12490000 0x10>;
>          clocks = <&clkgen 181>;
>          resets = <&rstgen 109>;
>          #pwm-cells = <3>;
> -- 
> 2.43.2
> 

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  parent reply	other threads:[~2026-05-15 13:06 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-15  5:47 [PATCH v18 0/3] Add OpenCores PTC PWM support Hal Feng
2026-05-15  5:47 ` [PATCH v18 1/3] dt-bindings: pwm: opencores: Drop starfive compatibles and update maintainers Hal Feng
2026-05-15  6:02   ` sashiko-bot
2026-05-15 13:06   ` Conor Dooley [this message]
2026-05-15  5:47 ` [PATCH v18 2/3] riscv: dts: starfive: Correct pwm nodes Hal Feng
2026-05-15  6:34   ` sashiko-bot
2026-05-15 13:09   ` Conor Dooley
2026-05-15  5:47 ` [PATCH v18 3/3] pwm: Add OpenCores PTC PWM driver Hal Feng
2026-05-15  7:02   ` sashiko-bot

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