Re: [PATCH v7 5/6] arm64: dts: qcom: sm8350: add Iris device

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] The fallback driver `qcom,sm8250-venus` lacks support for the `mmcx` power domain, causing silent dynamic voltage scaling failures and hardware instability.
- [Medium] The `video-codec@aa00000` node violates the `qcom,sm8250-venus` DT schema constraints by defining 4 power domains.
--

commit 2b4298f622bad3f707d0f7effff3c5046a527949
Author: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
arm64: dts: qcom: sm8350: add Iris device

This commit adds Iris and video clock controller devices, describing the
Iris2 core present on this platform.

> diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
[ ... ]
> @@ -2745,6 +2747,85 @@ usb_2_dwc3: usb@a800000 {
[ ... ]
> +		iris: video-codec@aa00000 {
> +			compatible = "qcom,sm8350-iris", "qcom,sm8250-venus";
> +			reg = <0x0 0x0aa00000 0x0 0x100000>;
> +			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> +
> +			clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
> +				 <&videocc VIDEO_CC_MVS0C_CLK>,
> +				 <&videocc VIDEO_CC_MVS0_CLK>;
> +			clock-names = "iface",
> +				      "core",
> +				      "vcodec0_core";
> +			power-domains = <&videocc MVS0C_GDSC>,
> +					<&videocc MVS0_GDSC>,
> +					<&rpmhpd RPMHPD_MX>,
> +					<&rpmhpd RPMHPD_MMCX>;
> +			power-domain-names = "venus",
> +					     "vcodec0",
> +					     "mx",
> +					     "mmcx";

The qcom,sm8250-venus schema restricts power-domains to maxItems: 3 and
power-domain-names to venus, vcodec0, and mx. Since this node uses the
qcom,sm8250-venus fallback compatible string and defines 4 power domains
including mmcx, will this cause make dtbs_check to fail with validation
errors?

> +
> +			resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>,
> +				 <&videocc VIDEO_CC_MVS0C_CLK_ARES>;
> +			reset-names = "bus", "core";
> +
> +			interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
> +					 &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
> +					<&mmss_noc MASTER_VIDEO_P0 QCOM_ICC_TAG_ALWAYS
> +					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
> +			interconnect-names = "cpu-cfg",
> +					     "video-mem";
> +
> +			operating-points-v2 = <&iris_opp_table>;
> +			iommus = <&apps_smmu 0x2100 0x400>;
> +			memory-region = <&pil_video_mem>;
> +
> +			status = "disabled";
> +
> +			iris_opp_table: opp-table {
> +				compatible = "operating-points-v2";
> +
> +				opp-240000000 {
> +					opp-hz = /bits/ 64 <240000000>;
> +					required-opps = <&rpmhpd_opp_svs>,
> +							<&rpmhpd_opp_low_svs>;
> +				};
> +
> +				opp-338000000 {
> +					opp-hz = /bits/ 64 <338000000>;
> +					required-opps = <&rpmhpd_opp_svs>,
> +							<&rpmhpd_opp_svs>;
> +				};
> +
> +				opp-366000000 {
> +					opp-hz = /bits/ 64 <366000000>;
> +					required-opps = <&rpmhpd_opp_svs_l1>,
> +							<&rpmhpd_opp_svs_l1>;
> +				};
> +
> +				opp-444000000 {
> +					opp-hz = /bits/ 64 <444000000>;
> +					required-opps = <&rpmhpd_opp_svs_l1>,
> +							<&rpmhpd_opp_nom>;
> +				};

The iris_opp_table specifies two required-opps for each frequency point to
dynamically scale both the mx and mmcx power domains. However, because a
specific qcom,sm8350-iris driver is not implemented, the kernel will bind
this device to the fallback qcom,sm8250-venus driver.

The qcom,sm8250-venus platform driver data explicitly requests and attaches
only the mx OPP domain, entirely omitting mmcx. During dynamic voltage
scaling, the OPP framework will silently skip casting the second required-opp
vote because the mmcx index in required_devs is NULL.

Will this cause the MMCX voltage to statically remain at its baseline low_svs
while the Iris core runs at high frequencies like 444MHz, potentially leading
to hardware hangs or system crashes?

> +			};
> +		};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260515-iris-sc8280xp-v7-0-2e21f6db1897@oss.qualcomm.com?part=5