* [PATCH 0/1] add USB PHY node and USB OTG pinctrl support to S32G2/S32G3 SoCs @ 2026-05-18 6:15 Khristine Andreea Barbulescu 2026-05-18 6:15 ` [PATCH 1/1] arm64: dts: Add usbphynop and usbotg pinctrl for S32G platforms Khristine Andreea Barbulescu 0 siblings, 1 reply; 3+ messages in thread From: Khristine Andreea Barbulescu @ 2026-05-18 6:15 UTC (permalink / raw) To: Chester Lin, Matthias Brugger, Ghennadi Procopciuc, Frank Li, Sascha Hauer, Fabio Estevam, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: Pengutronix Kernel Team, linux-arm-kernel, imx, devicetree, linux-kernel, NXP S32 Linux, Christophe Lizzi, Alberto Ruiz, Enric Balletbo This patchset aims to add two changes to the S32G2/S32G3 dtsi support: - Add the usbphynop node for S32G SoC based boards - Add the usbotg pinctrl support for S32G SoC based boards Khristine Andreea Barbulescu (1): arm64: dts: Add usbphynop and usbotg pinctrl for S32G platforms .../boot/dts/freescale/s32gxxxa-evb.dtsi | 53 ++++++++++++++++++- .../boot/dts/freescale/s32gxxxa-rdb.dtsi | 53 ++++++++++++++++++- 2 files changed, 104 insertions(+), 2 deletions(-) -- 2.34.1 ^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH 1/1] arm64: dts: Add usbphynop and usbotg pinctrl for S32G platforms 2026-05-18 6:15 [PATCH 0/1] add USB PHY node and USB OTG pinctrl support to S32G2/S32G3 SoCs Khristine Andreea Barbulescu @ 2026-05-18 6:15 ` Khristine Andreea Barbulescu 2026-05-18 6:32 ` sashiko-bot 0 siblings, 1 reply; 3+ messages in thread From: Khristine Andreea Barbulescu @ 2026-05-18 6:15 UTC (permalink / raw) To: Chester Lin, Matthias Brugger, Ghennadi Procopciuc, Frank Li, Sascha Hauer, Fabio Estevam, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: Pengutronix Kernel Team, linux-arm-kernel, imx, devicetree, linux-kernel, NXP S32 Linux, Christophe Lizzi, Alberto Ruiz, Enric Balletbo Add the usbphynop node and the usbotg pinctrl support for the S32G2 and S32G3 SoCs. This enables the USB controller to reference the generic PHY and use the required pinmux for USB OTG ops. Signed-off-by: Khristine Andreea Barbulescu <khristineandreea.barbulescu@oss.nxp.com> --- .../boot/dts/freescale/s32gxxxa-evb.dtsi | 53 ++++++++++++++++++- .../boot/dts/freescale/s32gxxxa-rdb.dtsi | 53 ++++++++++++++++++- 2 files changed, 104 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi b/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi index 803ff4531077..d096744cdb0f 100644 --- a/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi +++ b/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi @@ -1,12 +1,19 @@ // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) /* - * Copyright 2024 NXP + * Copyright 2024, 2026 NXP * * Authors: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com> * Ghennadi Procopciuc <ghennadi.procopciuc@oss.nxp.com> * Larisa Grigore <larisa.grigore@nxp.com> */ +/ { + usbphynop: usbphynop { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; +}; + &pinctrl { can0_pins: can0-pins { can0-grp0 { @@ -245,6 +252,39 @@ dspi5-grp4 { bias-pull-up; }; }; + + usbotg_pins: usbotg_pins { + usbotg_grp0 { + pinmux = <0x3802>, <0x3812>, + <0x3822>, <0x3832>, + <0x3842>, <0x3852>, + <0x3862>, <0x3872>, + <0x37f2>, <0x3882>, + <0x3892>; + }; + + usbotg_grp1 { + pinmux = <0x3e1>, <0x3f1>, + <0x401>, <0x411>, + <0xbc1>, <0xbd1>, + <0xbe1>, <0x701>; + output-enable; + input-enable; + slew-rate = <208>; + }; + + usbotg_grp2 { + pinmux = <0xb80>, <0xb90>, <0xbb0>; + input-enable; + slew-rate = <208>; + }; + + usbotg_grp3 { + pinmux = <0xba1>; + output-enable; + slew-rate = <208>; + }; + }; }; &can0 { @@ -304,3 +344,14 @@ &spi5 { pinctrl-names = "default"; status = "okay"; }; + +&usbmisc { + status = "okay"; +}; + +&usbotg { + pinctrl-names = "default"; + pinctrl-0 = <&usbotg_pins>; + fsl,usbphy = <&usbphynop>; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi b/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi index 979868f6d2c5..b756bcf6469d 100644 --- a/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi +++ b/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi @@ -1,12 +1,19 @@ // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) /* - * Copyright 2024 NXP + * Copyright 2024, 2026 NXP * * Authors: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com> * Ghennadi Procopciuc <ghennadi.procopciuc@oss.nxp.com> * Larisa Grigore <larisa.grigore@nxp.com> */ +/ { + usbphynop: usbphynop { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; +}; + &pinctrl { can0_pins: can0-pins { can0-grp0 { @@ -199,6 +206,39 @@ dspi5-grp4 { bias-pull-up; }; }; + + usbotg_pins: usbotg_pins { + usbotg_grp0 { + pinmux = <0x3802>, <0x3812>, + <0x3822>, <0x3832>, + <0x3842>, <0x3852>, + <0x3862>, <0x3872>, + <0x37f2>, <0x3882>, + <0x3892>; + }; + + usbotg_grp1 { + pinmux = <0x3e1>, <0x3f1>, + <0x401>, <0x411>, + <0xbc1>, <0xbd1>, + <0xbe1>, <0x701>; + output-enable; + input-enable; + slew-rate = <208>; + }; + + usbotg_grp2 { + pinmux = <0xb80>, <0xb90>, <0xbb0>; + input-enable; + slew-rate = <208>; + }; + + usbotg_grp3 { + pinmux = <0xba1>; + output-enable; + slew-rate = <208>; + }; + }; }; &can0 { @@ -257,3 +297,14 @@ &i2c4 { pinctrl-1 = <&i2c4_gpio_pins>; status = "okay"; }; + +&usbmisc { + status = "okay"; +}; + +&usbotg { + pinctrl-names = "default"; + pinctrl-0 = <&usbotg_pins>; + fsl,usbphy = <&usbphynop>; + status = "okay"; +}; -- 2.34.1 ^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH 1/1] arm64: dts: Add usbphynop and usbotg pinctrl for S32G platforms 2026-05-18 6:15 ` [PATCH 1/1] arm64: dts: Add usbphynop and usbotg pinctrl for S32G platforms Khristine Andreea Barbulescu @ 2026-05-18 6:32 ` sashiko-bot 0 siblings, 0 replies; 3+ messages in thread From: sashiko-bot @ 2026-05-18 6:32 UTC (permalink / raw) To: Khristine Andreea Barbulescu; +Cc: devicetree, robh, conor+dt, imx, Frank.Li Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider: - [Medium] The `&usbotg` node uses the undocumented `fsl,usbphy` property, which will cause `dtbs_check` validation to fail. - [Low] Device tree node names use underscores instead of hyphens and do not follow generic naming conventions. -- commit 009a8765a0c4d65ac0ce298f231d2203b966088a Author: Khristine Andreea Barbulescu <khristineandreea.barbulescu@oss.nxp.com> arm64: dts: Add usbphynop and usbotg pinctrl for S32G platforms This commit adds a usb-nop-xceiv node and pinctrl configurations for the usbotg interface on S32G2 and S32G3 platforms. It enables the USB controller to reference the generic PHY and configures pin multiplexing. > diff --git a/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi b/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi > --- a/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi > +++ b/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi [ ... ] > +/ { > + usbphynop: usbphynop { This isn't a bug, but does the usbphynop node name follow the devicetree specification's generic names recommendation? Would a standard class name like phy or usb-phy be more appropriate? > + compatible = "usb-nop-xceiv"; > + #phy-cells = <0>; > + }; > +}; > + [ ... ] > + > + usbotg_pins: usbotg_pins { > + usbotg_grp0 { Are these underscores in the node names intentional? The devicetree specification mandates using hyphens instead of underscores for node names, and compiling with dtc warnings enabled will produce warnings here. Should these be named usbotg-pins and usbotg-grp0, along with the other usbotg_grp nodes? > + pinmux = <0x3802>, <0x3812>, > + <0x3822>, <0x3832>, [ ... ] > +&usbotg { > + pinctrl-names = "default"; > + pinctrl-0 = <&usbotg_pins>; > + fsl,usbphy = <&usbphynop>; Will this fsl,usbphy property cause dtbs_check validation to fail? The S32G platforms use the nxp,s32g2-usb compatible string, which is validated by Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml. That schema specifies unevaluatedProperties: false and does not define the legacy fsl,usbphy property. Would using the standard phys property (phys = <&usbphynop>;) work instead, as it is automatically parsed as a fallback by the ci_hdrc_imx driver? > + status = "okay"; > +}; [ ... ] -- Sashiko AI review · https://sashiko.dev/#/patchset/20260518061522.2884441-2-khristineandreea.barbulescu@oss.nxp.com?part=1 ^ permalink raw reply [flat|nested] 3+ messages in thread
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